A single-ended 12-bit 20 Msample/s self-calibrating pipeline A/D converter. - Ion E. Opris; Laurence D. Lewicki; Bill C. Wong (IEEE J. Solid State Circuits, 1998)

A pipeline A/D converter architecture with low DNL. - Ion E. Opris; Bill C. Wong; Sing W. Chin (IEEE J. Solid State Circuits, 2000)

A 12b 50MSPS 34mW pipelined ADC. - Hao Yu; Sing W. Chin; Bill C. Wong (CICC, 2008)