Parameters extraction on HfOX based RRAM. - Peng Huang 004; Bing Chen; Haitong Li; Zhe Chen; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang (ESSDERC, 2014)

Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture. - Jinfeng Kang; Bin Gao 006; Bing Chen; Peng Huang 004; Feifei Zhang; Xiaoyan Liu; Hong-Yu Chen; Zizhen Jiang; H.-S. Philip Wong; Shimeng Yu (ISCAS, 2014)

Design guidelines for 3D RRAM cross-point architecture. - Shimeng Yu; Yexin Deng; Bin Gao 006; Peng Huang 004; Bing Chen; Xiaoyan Liu; Jinfeng Kang; Hong-Yu Chen; Zizhen Jiang; H.-S. Philip Wong (ISCAS, 2014)

Modeling and design optimization of ReRAM. - Jinfeng Kang; Haitong Li; Peng Huang 004; Zhe Chen; Bin Gao 006; Xiaoyan Liu; Zizhen Jiang; H.-S. Philip Wong (ASP-DAC, 2015)

Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model. - Haitong Li; Zizhen Jiang; Peng Huang 004; Y. Wu; Hong-Yu Chen; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang; H.-S. Philip Wong (DATE, 2015)

RRAM based synaptic devices for neuromorphic visual systems. - Jinfeng Kang; Bin Gao 006; Peng Huang 004; Lifeng Liu; Xiaoyan Liu; H. Y. Yu; Shimeng Yu; H.-S. Philip Wong (DSP, 2015)

The effect of variation on neuromorphic network based on 1T1R memristor array. - Peng Yao; Huaqiang Wu; Bin Gao 006; Guo Zhang; He Qian (NVMTS, 2015)

RRAM Cross-Point Arrays. - Huaqiang Wu; Yan Liao; Bin Gao 006; Debanjan Jana; He Qian (3D Flash Memories, 2016)

Physical understanding and optimization of resistive switching characteristics in oxide-RRAM. - Jinfeng Kang; Peng Huang 004; Zhe Chen; Yudi Zhao; Chen Liu 009; Runze Han; Lifeng Liu; Xiaoyan Liu; Yangyuan Wang; Bin Gao 006 (ESSDERC, 2016)

Device and Circuit Interaction Analysis of Stochastic Behaviors in Cross-Point RRAM Arrays. - Haitong Li; Peng Huang 004; Bin Gao 006; Xiaoyan Liu; Jinfeng Kang; H.-S. Philip Wong (CoRR, 2016)

Optimization of writing scheme on 1T1R RRAM to achieve both high speed and good uniformity. - Shan Wang; Huaqiang Wu; Bin Gao 006; Ning Deng 008; Dong Wu; He Qian (ESSDERC, 2017)

Neuromorphic Computing based on Resistive RAM. - Zixuan Chen; Huaqiang Wu; Bin Gao 006; Peng Yao; Xinyi Li; He Qian (ACM Great Lakes Symposium on VLSI, 2017)

New structure with SiO2-gate-dielectric select gates in vertical-channel three-dimensional (3D) NAND flash memory. - Bo Wang 067; Bin Gao 006; Huaqiang Wu; He Qian (Microelectron. Reliab., 2017)

Resistive Random Access Memory for Future Information Processing System. - Huaqiang Wu; Xiao Hu Wang; Bin Gao 006; Ning Deng 008; Zhichao Lu; Brent Haukness; Gary Bronner; He Qian (Proc. IEEE, 2017)

Sign backpropagation: An on-chip learning algorithm for analog RRAM neuromorphic computing systems. - Qingtian Zhang; Huaqiang Wu; Peng Yao; Wenqiang Zhang; Bin Gao 006; Ning Deng 008; He Qian (Neural Networks, 2018)

Design Guidelines of RRAM based Neural-Processing-Unit: A Joint Device-Circuit-Algorithm Analysis. - Wenqiang Zhang; Xiaochen Peng; Huaqiang Wu; Bin Gao 006; Hu He 001; Youhui Zhang; Shimeng Yu; He Qian (DAC, 2019)

Reliability Perspective on Neuromorphic Computing Based on Analog RRAM. - Huaqiang Wu; Meiran Zhao; Yuyi Liu; Peng Yao; Yue Xi; Xinyi Li; Wei Wu; Qingtian Zhang; Jianshi Tang; Bin Gao 006; He Qian (IRPS, 2019)

A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10-6 Native Bit Error Rate. - Yachun Pang; Bin Gao 006; Dong Wu; Shengyu Yi; Qi Liu 010; Wei-Hao Chen; Ting-Wei Chang; Wei-En Lin; Xiaoyu Sun 001; Shimeng Yu; He Qian; Meng-Fan Chang; et al. (ISSCC, 2019)

Three-Dimensional nand Flash for Vector-Matrix Multiplication. - Panni Wang; Feng Xu; Bo Wang 067; Bin Gao 006; Huaqiang Wu; He Qian; Shimeng Yu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A circuit-algorithm codesign method to reduce the accuracy drop of RRAM based computing-in-memory chip. - Wenqiang Zhang; Bin Gao 006; Peng Yao; Jianshi Tang; Huqiang Wu; He Qian (ICTA, 2020)

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. - Qi Liu 010; Bin Gao 006; Peng Yao; Dong Wu; Junren Chen; Yachuan Pang; Wenqiang Zhang; Yan Liao; Cheng-Xin Xue; Wei-Hao Chen; Jianshi Tang; Yu Wang 002; et al. (ISSCC, 2020)

33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models. - Weier Wan; Rajkumar Kubendran; Sukru Burc Eryilmaz; Wenqiang Zhang; Yan Liao; Dabin Wu; Stephen R. Deiss; Bin Gao 006; Priyanka Raina; Siddharth Joshi 001; Huaqiang Wu; Gert Cauwenberghs; et al. (ISSCC, 2020)

An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. - Yiwen Geng; Bin Gao 006; Qingtian Zhang; Wenqiang Zhang; Peng Yao; Yue Xi; Yudeng Lin; Junren Chen; Jianshi Tang; Huaqiang Wu; He Qian (DATE, 2021)

Impact of Bottom Electrode Roughness on the Analog Switching Characteristics in Nanoscale RRAM Array. - Wenbin Zhang; Jianshi Tang; Bin Gao 006; Wen Sun; Wei Liu; Kanwen Wang; Wei Wu; He Qian; Huaqiang Wu (DRC, 2021)

System and Technology Co-optimization for RRAM based Computation-in-memory Chip. - Yuyi Liu; Bin Gao 006 (ICICDT, 2021)

HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU. - Yanhai Jiang; Bin Gao 006; Jianshi Tang; Dabin Wu; Hu He 001; He Qian; Huaqiang Wu (ICTA, 2021)

Recent progress of integrated circuits and optoelectronic chips. - Yue Hao 001; Shuiying Xiang; Genquan Han; Jincheng Zhang; Xiaohua Ma 001; Zhangming Zhu; Xingxing Guo; Yahui Zhang; Yanan Han; Ziwei Song; Yan Liu; Ling Yang 003; et al. (Sci. China Inf. Sci., 2021)

Array-level boosting method with spatial extended allocation to improve the accuracy of memristor based computing-in-memory chips. - Wenqiang Zhang; Bin Gao 006; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (Sci. China Inf. Sci., 2021)

Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory. - Weier Wan; Rajkumar Kubendran; Clemens J. S. Schaefer; Sukru Burc Eryilmaz; Wenqiang Zhang; Dabin Wu; Stephen R. Deiss; Priyanka Raina; He Qian; Bin Gao 006; Siddharth Joshi 001; Huaqiang Wu; et al. (CoRR, 2021)

A Highly Reliable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source. - Bohan Lin; Yachuan Pang; Bin Gao 006; Jianshi Tang; Dong Wu; Ting-Wei Chang; Wei-En Lin; Xiaoyu Sun 001; Shimeng Yu; Meng-Fan Chang; He Qian; Huaqiang Wu (IEEE J. Solid State Circuits, 2021)

In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective. - Yue Xi; Bin Gao 006; Jianshi Tang; An Chen; Meng-Fan Chang; Xiaobo Sharon Hu; Jan Van der Spiegel; He Qian; Huaqiang Wu (Proc. IEEE, 2021)

Diagonal Matrix Regression Layer: Training Neural Networks on Resistive Crossbars With Interconnect Resistance Effect. - Yan Liao; Bin Gao 006; Peng Yao; Wenqiang Zhang; Jianshi Tang; Huaqiang Wu; He Qian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

A Physical Reservoir Computing Model Based on Volatile Memristor for Temporal Signal Processing. - Xiangpeng Liang; Yanan Zhong; Xinyi Li; Heyi Huang; Tingyu Li; Jianshi Tang; Bin Gao 006; He Qian; Huaqiang Wu; Hadi Heidari (ICECS 2022, 2022)

Large-Scale Integrated Flexible Tactile Sensor Array for Sensitive Smart Robotic Touch. - Zhenxuan Zhao; Jianshi Tang; Jian Yuan; Yijun Li; Yuan Dai; Jian Yao; Qingtian Zhang; Sanchuan Ding; Tingyu Li; Ruirui Zhang; Yu Zheng 001; Zhengyou Zhang; et al. (CoRR, 2022)

A compute-in-memory chip based on resistive random-access memory. - Weier Wan; Rajkumar Kubendran; Clemens J. S. Schaefer; Sukru Burc Eryilmaz; Wenqiang Zhang; Dabin Wu; Stephen R. Deiss; Priyanka Raina; He Qian; Bin Gao 006; Siddharth Joshi 001; Huaqiang Wu; et al. (Nat., 2022)

Complementary Memtransistor-Based Multilayer Neural Networks for Online Supervised Learning Through (Anti-)Spike-Timing-Dependent Plasticity. - Yue Zhou; Nuo Xu; Bin Gao 006; Fuwei Zhuge; Zijian Tang; Xinchen Deng; Yi Li 049; Yuhui He; Xiangshui Miao (IEEE Trans. Neural Networks Learn. Syst., 2022)

Memristor Based Mixed-Precision Computation-in-Memory System. - Bin Gao 006 (ICICDT, 2023)

Memristor Based Mixed-Accuracy Computation-in-Memory System. - Ze Wang; Ruihua Yu; Bin Gao 006 (ICICDT, 2023)

Impact of Programming Process on Temperature Coefficient in Analog RRAM. - Siyao Yang; Bin Gao 006; Jianshi Tang; Feng Xu; Peng Yao; He Qian; Huaqiang Wu (ICICDT, 2023)

ACCLAIM: An End-to-End SystemC-AMS Simulation Framework for Analog In-Memory-Computing. - Hanwen Gong; Hu He 001; Bin Gao 006; Jianshi Tang; Qingtian Zhang; He Qian; Huaqiang Wu (ICTA, 2023)

Thermal Induced Retention Degradation of RRAM-based Neuromorphic Computing Chips. - Awang Ma; Bin Gao 006; Xing Mou; Peng Yao; Yiwei Du; Jianshi Tang; He Qian; Huaqiang Wu (IRPS, 2023)

A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic 3D Integration for High-Performance Systems. - Jiaming Li; Bin Gao 006; Ruihua Yu; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (NANOARCH, 2023)

Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture. - Yiwei Du; Jianshi Tang; Yijun Li; Yue Xi; Bin Gao 006; He Qian; Huaqiang Wu (VLSI Technology and Circuits, 2023)

An RRAM retention prediction framework using a convolutional neural network based on relaxation behavior. - Yibei Zhang; Qingtian Zhang; Qi Qin; Wenbin Zhang; Yue Xi; Zhixing Jiang; Jianshi Tang; Bin Gao 006; He Qian; Huaqiang Wu (Neuromorph. Comput. Eng., 2023)

A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qi Qin; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

BETTER: Bayesian-Based Training and Lightweight Transfer Architecture for Reliable and High-Speed Memristor Neural Network Deployment. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Uncertainty quantification via a memristor Bayesian deep neural network for risk-sensitive reinforcement learning. - Yudeng Lin; Qingtian Zhang; Bin Gao 006; Jianshi Tang; Peng Yao; Chongxuan Li; Shiyu Huang 001; Zhengwu Liu; Ying Zhou; Yuyi Liu; Wenqiang Zhang; Jun Zhu 001; et al. (Nat. Mac. Intell., 2023)

A 1-Mb Programming Configurable ReRAM Fully Integrating Into a 32-Bit Microcontroller Unit. - Hanwen Gong; Hu He 001; Bin Gao 006; Jianshi Tang; Jian Yu; Dabin Wu; Junren Chen; Qingtian Zhang; Xing Mou; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Architecture-circuit-technology co-optimization for resistive random access memory-based computation-in-memory chips. - Yuyi Liu; Bin Gao 006; Jianshi Tang; Huaqiang Wu; He Qian (Sci. China Inf. Sci., 2023)

CLEAR: a full-stack chip-in-loop emulator for analog RRAM based computing-in-memory system. - Ruihua Yu; Wenqiang Zhang; Bin Gao 006; Yiwen Geng; Peng Yao; Yuyi Liu; Qingtian Zhang; Jianshi Tang; Dong Wu; Hu He 001; Ning Deng 008; He Qian; et al. (Sci. China Inf. Sci., 2023)

An Error-Free 64KB ReRAM-Based nvSRAM Integrated to a Microcontroller Unit Supporting Real-Time Program Storage and Restoration. - Hanwen Gong; Hu He 001; Liyang Pan; Bin Gao 006; Jianshi Tang; Sining Pan; Jianing Li; Peng Yao; Dabin Wu; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

ANVMP: A 28nm 52.6 μW 1.25pJ/SOP Asynchronous Non- Volatile-Memory-based Computing-In-Memory Neuromorphic Processor for Edge-Al Applications. - Jilin Zhang; Qiumeng Wei; Dexuan Huo; Tao Li; Bin Gao 006; He Qian; Huaqiang Wu; Kea-Tiong Tang; Hong Chen 002 (A-SSCC, 2024)

An Intelligent Memory Architecture with LPDDR4 Extensions for Edge Generative AI Inference. - Zhuodong Kang; Bin Gao 006; Jianshi Tang; He Qian; Huaqiang Wu (ICTA, 2024)

A 3.75Mb Embedded RRAM IP on 40nm High-Voltage CMOS Technology. - Yuan He; Chengxiang Ma; Xiangchao Ma; Yilong Huang; Qianze Zheng; Yue Xi; Qiumeng Wei; Jianing Li; Xiaodong He; Yongqin Wu; Weihai Bu; Kai Zheng; et al. (IMW, 2024)

Statistical Modeling of Time-Dependent Post-Programming Conductance Drift in Analog RRAM. - Ruofei Hu; Jianshi Tang; Yue Xi; Zhixing Jiang; Yuyao Lu; Chengxiang Ma; Junchen Li; Bin Gao 006; He Qian; Huaqiang Wu (IRPS, 2024)

Compensation Architecture to Alleviate Noise Effects in RRAM-based Computing-in-memory Chips with Residual Resource. - Xiaoqing Zhao; Longjun Liu; Yuyi Liu; Bin Gao 006; Hongbin Sun 001 (ISCAS, 2024)

A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications. - Ziyi Liu; Yiwei Du; Renrong Liang; Zhigang Zhang; Liyang Pan; Jianshi Tang; Renrong Liang; Bin Gao 006; Qi Hu; Jun Xu; He Qian; Huaqiang Wu; et al. (VLSI Technology and Circuits, 2024)

Monolithic 3D Integration of Analog RRAM-Based Fully Weight Stationary and Novel CFET 2T0C-Based Partially Weight Stationary for Accelerating Transformer. - H. Yang; Y. Li; Jianshi Tang; R. An; Y. Zhang; L. Gao; N. Gao; H. Xu; Y. Du; Z. Liu; X. Ma; G. Wang; et al. (VLSI Technology and Circuits, 2024)

Compensation architecture design utilizing residual resource to mitigate impacts of nonidealities in RRAM-based computing-in-memory chips. - Xiaoqing Zhao; Longjun Liu; Yuyi Liu; Bin Gao 006; Hongbin Sun 001 (Microelectron. J., 2024)

Industry-Oriented Detection Method of PCBA Defects Using Semantic Segmentation Models. - Yang Li 114; Xiao Wang; Zhifan He; Ze Wang; Ke Cheng; Sanchuan Ding; Yijing Fan; Xiaotao Li; Yawen Niu; Shanpeng Xiao; Zhenqi Hao; Bin Gao 006; et al. (IEEE CAA J. Autom. Sinica, 2024)

A Reconfigurable Computing-in-Memory Accelerator With Dynamic Group-Based Dataflow and Dual-Input Macro Designs. - Pufan Xu; Xing Mou; Bin Gao 006; Qiumeng Wei; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Precision-Adaptive ECC Strategy with Computing Fusion Decoding for Near/In-Memory Computing. - Pufan Xu; Peng Yao; Bin Gao 006; Jianshi Tang; He Qian; Huaqiang Wu (IMW, 2025)

Deep Bayesian active learning using in-memory computing hardware. - Yudeng Lin; Bin Gao 006; Jianshi Tang; Qingtian Zhang; He Qian; Huaqiang Wu (Nat. Comput. Sci., 2025)