9.8 An 860μW 2.1-to-2.7GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications. - Vamshi Krishna Chillara; Yao-Hong Liu; Bindi Wang; Ao Ba; Maja Vidojkovic; Kathleen Philips; Harmke de Groot; Robert Bogdan Staszewski (ISSCC, 2014)

A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS. - Bindi Wang; Yao-Hong Liu; Pieter Harpe; Johan H. C. van den Heuvel; Bo Liu; Hao Gao 001; Robert Bogdan Staszewski (ISCAS, 2015)

Poster: A 60 GHz phased array system evaluation based on a 5-bit phase shifter in CMOS technology. - Bindi Wang; Hao Gao 001; Kuangyuan Ying; Marion K. Matters-Kammerer; Peter G. M. Baltus (SCVT, 2016)

Interpolation based wideband beamforming architecture. - Bindi Wang; Hao Gao 001; Marion K. Matters-Kammerer; Peter G. M. Baltus (ISCAS, 2017)

An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS. - Yao-Hong Liu; Johan H. C. van den Heuvel; Takashi Kuramochi; Benjamin Busze; Paul Mateman; Vamshi Krishna Chillara; Bindi Wang; Robert Bogdan Staszewski; Kathleen Philips (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Reconfigurable Receiver with 38 dB Frequency-Independent Blocker Suppression and Enhanced in-B and Linearity and Power Efficiency. - Kuangyuan Ying; Carlos A. M. Costa Júnior; Bindi Wang; Dusan M. Milosevic; Hao Gao 001; Peter G. M. Baltus (ESSCIRC, 2018)