Tolerating Noise in MLC PCM with Multi-Bit Error Correction Code. - Bing Li 017; Shuchang Shan; Yu Hu 001; Xiaowei Li 001 (PRDC, 2013)

Partial-SET: Write speedup of PCM main memory. - Bing Li 017; Shuchang Shan; Yu Hu 001; Xiaowei Li 001 (DATE, 2014)

Short-SET: An energy-efficient write scheme for MLC PCM. - Bing Li 017; Yu Hu 001; Xiaowei Li 001 (NVMSA, 2014)

Power-Utility-Driven Write Management for MLC PCM. - Bing Li 017; Yu Hu 001; Ying Wang 001; Jing Ye 001; Xiaowei Li 001 (ACM J. Emerg. Technol. Comput. Syst., 2017)

Running sparse and low-precision neural network: When algorithm meets hardware. - Bing Li 017; Wei Wen; Jiachen Mao; Sicheng Li 001; Yiran Chen 001; Hai Helen Li (ASP-DAC, 2018)

ReRAM-based accelerator for deep learning. - Bing Li 017; Linghao Song; Fan Chen 001; Xuehai Qian; Yiran Chen 001; Hai Helen Li (DATE, 2018)

Design and Data Management for Magnetic Racetrack Memory. - Bing Li 017; Fan Chen 001; Wang Kang 001; Weisheng Zhao; Yiran Chen 001; Hai Li 001 (ISCAS, 2018)

Exploration of Automatic Mixed-Precision Search for Deep Neural Networks. - Xuyang Guo; Yuanjun Huang; Hsin-Pai Cheng; Bing Li 017; Wei Wen; Siyuan Ma; Hai Helen Li; Yiran Chen 001 (AICAS, 2019)

Build reliable and efficient neuromorphic design with memristor technology. - Bing Li 017; Bonan Yan; Chenchen Liu; Hai (Helen) Li (ASP-DAC, 2019)

RED: A ReRAM-based Deconvolution Accelerator. - Zichen Fan; Ziru Li; Bing Li 017; Yiran Chen 001; Hai Helen Li (DATE, 2019)

REGENT: A Heterogeneous ReRAM/GPU-based Architecture Enabled by NoC for Training CNNs. - Biresh Kumar Joardar; Bing Li 017; Janardhan Rao Doppa; Hai Li 001; Partha Pratim Pande; Krishnendu Chakrabarty (DATE, 2019)

An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications. - Bing Li 017; Bonan Yan; Hai Li 001 (ACM Great Lakes Symposium on VLSI, 2019)

Enhance the Robustness to Time Dependent Variability of ReRAM-Based Neuromorphic Computing Systems with Regularization and 2R Synapse. - Qilin Zheng; Jian Kang; Zongwei Wang 001; Yimao Cai; Ru Huang 001; Bing Li 017; Yiran Chen 001; Hai Helen Li (ISCAS, 2019)

Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives. - Bonan Yan; Bing Li 017; Ximing Qiao; Cheng-Xin Xue; Meng-Fan Chang; Yiran Chen 001; Hai Helen Li (Adv. Intell. Syst., 2019)

PUFPass: A password management mechanism based on software/hardware codesign. - Qingli Guo; Jing Ye 001; Bing Li 017; Yu Hu 001; Xiaowei Li 001; Yazhu Lan; Guohe Zhang (Integr., 2019)

Thread Batching for High-performance Energy-efficient GPU Memory Design. - Bing Li 017; Mengjie Mao; Xiaoxiao Liu 001; Tao Liu 023; Zihao Liu; Wujie Wen; Yiran Chen 001; Hai (Helen) Li (ACM J. Emerg. Technol. Comput. Syst., 2019)

RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator. - Songyun Qu; Bing Li 017; Ying Wang 001; Dawen Xu 002; Xiandong Zhao; Lei Zhang 008 (DAC, 2020)

HitM: High-Throughput ReRAM-based PIM for Multi-Modal Neural Networks. - Bing Li 017; Ying Wang 001; Yiran Chen 001 (ICCAD, 2020)

A Many-Core Accelerator Design for On-Chip Deep Reinforcement Learning. - Ying Wang 001; Mengdi Wang; Bing Li 017; Huawei Li 001; Xiaowei Li 001 (ICCAD, 2020)

3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks. - Bing Li 017; Janardhan Rao Doppa; Partha Pratim Pande; Krishnendu Chakrabarty; Joe X. Qiu; Hai (Helen) Li (ACM J. Emerg. Technol. Comput. Syst., 2020)

RED: A ReRAM-Based Efficient Accelerator for Deconvolutional Computation. - Ziru Li; Bing Li 017; Zichen Fan; Hai Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

VADER: Leveraging the Natural Variation of Hardware to Enhance Adversarial Attack. - Hao Lv; Bing Li 017; Ying Wang 001; Cheng Liu 008; Lei Zhang 008 (ASP-DAC, 2021)

ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator. - Songyun Qu; Bing Li 017; Ying Wang 001; Lei Zhang 008 (DAC, 2021)

Tenet: A Neural Network Model Extraction Attack in Multi-core Architecture. - Chengsi Gao; Bing Li 017; Ying Wang 001; Weiwei Chen; Lei Zhang 008 (ACM Great Lakes Symposium on VLSI, 2021)

MT-DLA: An Efficient Multi-Task Deep Learning Accelerator Design. - Mengdi Wang; Bing Li 017; Ying Wang 001; Cheng Liu 008; Xiaohan Ma; Xiandong Zhao; Lei Zhang 008 (ACM Great Lakes Symposium on VLSI, 2021)

FeFET-based Process-in-Memory Architecture for Low-Power DNN Training. - Farzaneh Zokaee; Bing Li 017; Fan Chen 001 (NANOARCH, 2021)

InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs. - Yintao He; Songyun Qu; Ying Wang 001; Bing Li 017; Huawei Li 001; Xiaowei Li 001 (DAC, 2022)

Security Threat to the Robustness of RRAM-based Neuromorphic Computing System. - Bing Li 017; Hao Lv; Ying Wang 001; Yiran Chen 001 (iSES, 2022)

An Automated Quantization Framework for High-Utilization RRAM-Based PIM. - Bing Li 017; Songyun Qu; Ying Wang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision Quantization. - Yanjun Li; Chunshan Zu; Bingqian Wang; Zhenhua Zhu; Yaojun Zhang; Ran Duan; Bing Li 017; Bonan Yan (ACM Great Lakes Symposium on VLSI, 2023)

Full State Quantum Circuit Simulation Beyond Memory Limit. - Yilun Zhao 002; Yu Chen; He Li; Ying Wang 001; Kaiyan Chang; Bingmeng Wang; Bing Li 017; Yinhe Han 001 (ICCAD, 2023)

Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System. - Hao Lv; Bing Li 017; Lei Zhang 008; Cheng Liu 008; Ying Wang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators. - Songyun Qu; Bing Li 017; Shixin Zhao; Lei Zhang 008; Ying Wang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators. - Songyun Qu; Shixin Zhao; Bing Li 017; Yintao He; Xuyi Cai; Lei Zhang 008; Ying Wang 001 (ASPLOS (2), 2024)

Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. - Yibo Du; Ying Wang 001; Bing Li 017; Fuping Li; Shengwen Liang; Huawei Li 001; Xiaowei Li 001; Yinhe Han 001 (DAC, 2024)

SuperEncoder: Towards Universal Neural Approximate Quantum State Preparation. - Yilun Zhao 002; Bingmeng Wang; Wenle Jiang; Xiwei Pan; Bing Li 017; Yinhe Han 001; Ying Wang 001 (CoRR, 2024)

A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks. - Yintao He; Bing Li 017; Ying Wang 001; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

High-Parallel In-Memory NTT Engine with Hierarchical Structure and Even-Odd Data Mapping. - Bing Li 017; Huaijun Liu; Yibo Du; Ying Wang 001 (ASP-DAC, 2025)

Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators. - Shixin Zhao; Yuming Li; Bing Li 017; Yintao He; Mengdi Wang; Yinhe Han 001; Ying Wang 001 (ASPLOS (2), 2025)

Make LLM Inference Affordable to Everyone: Augmenting GPU Memory with NDP-DIMM. - Lian Liu; Shixin Zhao; Bing Li 017; Haimeng Ren; Zhaohui Xu; Mengdi Wang; Xiaowei Li 001; Yinhe Han 001; Ying Wang 001 (HPCA, 2025)

Attar: RRAM-based in-memory attention accelerator with software-hardware co-optimization. - Bing Li 017; Ying Qi; Ying Wang 001; Yinhe Han 001 (Sci. China Inf. Sci., 2025)

Accelerating Unstructured Sparse DNNs via Multilevel Partial Sum Reduction and PE Array-Level Load Balancing. - Chendong Xia; Qiang Li; Zhi Li 090; Bing Li 017; Huidong Zhao; Shushan Qiao (IEEE Trans. Very Large Scale Integr. Syst., 2025)