Yield Modeling of a WSI Telecom Router Architecture. - Bing Qiu 003; Yvon Savaria; Meng Lu; Chunyan Wang 004; Claude Thibeault (DFT, 2002)

IEEE 1149.1 Based Defect and Fault Tolerant Scan Chain for Wafer Scale Integration. - Meng Lu; Yvon Savaria; Bing Qiu 003; Jacques Taillefer (DFT, 2003)