QSCsim - Charge Based Switched Capacitor Simulator. - Binsu J. Kailath; Dinesh Ganesan (iNIS, 2016)

Improved alias rejection using interleaved CIC decimation filter. - S. S. Karthikeyan 001; Dinesh Ganesan; Binsu J. Kailath (NEWCAS, 2016)

Switched-capacitor circuit simulator in Q-V domain including nonidealities. - G. Muralidhar; Dinesh Ganesan; Binsu J. Kailath (VDAT, 2016)

Nonlinear PFD free of glitches and blind zone for a fast locking PLL with reduced reference spur. - Abdul Majeed Kottampara Kuppalath; Binsu J. Kailath (IEICE Electron. Express, 2016)

Realization of Multiplier Using Delay Efficient Cyclic Redundant Adder. - K. Dheepika; K. S. Jevasankari; Vippin Chandhar; Binsu J. Kailath (VDAT, 2017)

PLL architecture with a composite PFD and variable loop filter. - Abdul Majeed Kottampara Kuppalath; Binsu J. Kailath (IET Circuits Devices Syst., 2018)

FPGA Implementation of Speech Recognizer for Isolated Words. - Nithya K; Muralidhar Gadamsetty; Binsu J. Kailath (iSES, 2019)

A Silicon Neuron-based Bio-Front-End for Ultra Low Power Bio-Monitoring at the Edge. - T. P. Shivangi; M. Rahimi; Gaetano D. Gargiulo; Binsu J. Kailath; Tara Julia Hamilton (SSCI, 2020)

Reusable Spiking Neural Network Architecture. - Sai G. Pavan; Binsu J. Kailath (UEMCON, 2020)

A Novel Biphasic Neuron Encoder Implementation. - Madhuvanthi Srivatsav R; Binsu J. Kailath (AIIoT, 2021)

Bistable-Triplet STDP circuit without external memory for Integrating with Silicon Neurons. - Sathiya Jothi. S; Binsu J. Kailath (AIIoT, 2021)

Tree/link method for transfer function and stability analysis of switched-capacitor circuits. - Dinesh Ganesan; Binsu J. Kailath (Int. J. Circuit Theory Appl., 2021)

High speed Power efficient Vedic arithmetic modules on Zedboard-Zynq-7000 FPGA. - Sujitha S; Binsu J. Kailath (Int. J. Circuit Theory Appl., 2021)

Graph-Based Circuit Simulator for Switched Capacitor Circuits. - Dinesh Ganesan; Binsu J. Kailath (IEEE Des. Test, 2022)

CiMComp: An Energy Efficient Compute-in-Memory Based Comparator for Convolutional Neural Networks. - Kavitha S; Binsu J. Kailath; Bhupendra Singh Reniwal (DATE, 2024)

SNN with Gradient-based Backpropagation algorithm for ECG arrhythmia classification with LIF neuron and AdEx neuron. - Bana Shanmuga Sai Badrinatha Reddy; Priya K; Binsu J. Kailath (VDAT, 2024)

Development of Accurate Model for Memristor-Based Filters and Oscillators: Amplitude, Frequency and Ramp-Rate Dependent Analysis. - Rami Reddy Sowmya; Arige Sumanth; Binsu J. Kailath; Tejendra Dixit (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Atrial Flutter Detection System by AdEx Encoded Lead-II ECG. - Sushmi R; Priya K; Binsu J. Kailath (VLSID, 2025)