Design of a Parallel Vector Access Unit for SDRAM Memory Systems. - Binu K. Mathew; Sally A. McKee; John B. Carter; Al Davis (HPCA, 2000)

Algorithmic foundations for a parallel vector access memory system. - Binu K. Mathew; Sally A. McKee; John B. Carter; Al Davis (SPAA, 2000)

The Impulse Memory Controller. - Lixin Zhang 002; Zhen Fang 002; Michael A. Parker; Binu K. Mathew; Lambert Schaelicke; John B. Carter; Wilson C. Hsieh; Sally A. McKee (IEEE Trans. Computers, 2001)

A low-power accelerator for the SPHINX 3 speech recognition system. - Binu K. Mathew; Al Davis; Zhen Fang 002 (CASES, 2003)

Perception Coprocessors for Embedded Systems. - Binu K. Mathew; Al Davis; Ali Ibrahim (ESTIMedia, 2003)

A low power architecture for embedded perception. - Binu K. Mathew; Al Davis; Michael A. Parker (CASES, 2004)

A loop accelerator for low power embedded VLIW processors. - Binu K. Mathew; Al Davis (CODES+ISSS, 2004)

The Perception Processor. - Binu K. Mathew (2004)

New Technique for Fault Detection in Quantum Cellular Automata. - Binu K. Mathew; Shajimon K. John; C. Pradeep (ICETET, 2008)