Binary Counter Based Gated Clock Tree for Integrated CPU Chip. - Bipasha Nath; Alak Majumder (iNIS, 2017)

LECTOR Based Clock Gating for Low Power Multi-Stage Flip Flop Applications. - Pritam Bhattacharjee; Bipasha Nath; Alak Majumder (CoRR, 2018)

A Floating-Gate-Based Four-Channel Reconfigurable Analog Front-End Integrated Circuit. - Zu-Jia Lo; Bipasha Nath; Yuan-Chuan Wang; Yun-Jie Huang; Hui-Chun Huang; Sheng-Yu Peng (ISCAS, 2021)

A biphasic current-mode stimulator integrated circuit with a novel residual charge compensation mechanism. - Bipasha Nath; Sheng-Yu Peng; Zu-Jia Lo; Yu-Hsuan Pai; Yi-Ting Yeh; Huang-Hsiang Chang; Yi-Ching Lu; Shu-Hui Huang; Fang-Chia Chang (Integr., 2023)

A reconfigurable floating-gate-transistor-capacitor filter for analog signal processing. - Sheng-Yu Peng; Hung-Yu Shih; Bipasha Nath (Microelectron. J., 2023)