Theory and Applications of Cellular Automata for VLSI Design and Testing. - Parimal Pal Chaudhuri; Dipanwita Roy Chowdhury; Kolin Paul; Biplab K. Sikdar (VLSI Design, 2000)

GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. - Kolin Paul; Ranadeep Ghosal; Biplab K. Sikdar; Santashil Pal Chaudhuri; Dipanwita Roy Chowdhury (VLSI Design, 2000)

Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. - Biplab K. Sikdar; Kolin Paul; Gosta Pada Biswas; Parimal Pal Chaudhuri; Vamsi Boppana; Cliff Yang; Sobhan Mukherjee (VLSI Design, 2000)

Cellular automata as a built in self test structure. - Biplab K. Sikdar; Debesh K. Das; Vamsi Boppana; Cliff Yang; Sobhan Mukherjee; Parimal Pal Chaudhuri (ASP-DAC, 2001)

Multiple Attractor Cellular Automata for Hierarchical Diagnosis of VLSI Circuits. - Biplab K. Sikdar; Niloy Ganguly; Aniket Karmakar; Subha Sankar Chowdhury; Parimal Pal Chaudhuri (Asian Test Symposium, 2001)

Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis. - Biplab K. Sikdar; Samir Roy; Debesh K. Das (Asian Test Symposium, 2001)

Evolving Cellular Automata Based Associative Memory for Pattern Recognition. - Niloy Ganguly; Arijit Das; Pradipta Maji; Biplab K. Sikdar; Parimal Pal Chaudhuri (HiPC, 2001)

Design Of Multiple Attractor Gf (2p) Cellular AutomataFor Diagnosis Of Vlsi Circuits. - Biplab K. Sikdar; Purnabha Majumder; Parimal Pal Chaudhuri; Niloy Ganguly (VLSI Design, 2001)

Hierarchical Cellular Automata As An On-Chip Test Pattern Generator. - Biplab K. Sikdar; Purnabha Majumder; Monalisa Mukherjee; Parimal Pal Chaudhuri; Debesh K. Das; Niloy Ganguly (VLSI Design, 2001)

Evolving Cellular Automata as Pattern Classifier. - Niloy Ganguly; Pradipta Maji; Sandip Dhar; Biplab K. Sikdar; Parimal Pal Chaudhuri (ACRI, 2002)

Characterization of Non-linear Cellular Automata Model for Pattern Recognition. - Niloy Ganguly; Pradipta Maji; Arijit Das; Biplab K. Sikdar; Parimal Pal Chaudhuri (AFSS, 2002)

An Evolutionary Strategy To Design An On-Chip Test Pattern Generator Without Prohibited Pattern Set (PPS). - Niloy Ganguly; Anindyasundar Nandi; Sukanta Das; Biplab K. Sikdar; Parimal Pal Chaudhuri (Asian Test Symposium, 2002)

Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS). - Niloy Ganguly; Biplab K. Sikdar; Parimal Pal Chaudhuri (ASP-DAC/VLSI Design, 2002)

Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area. - Samir Roy; Biplab K. Sikdar; Monalisa Mukherjee; Debesh K. Das (ASP-DAC/VLSI Design, 2002)

Generalized Multiple Attractor Cellular Automata (GMACA) Model for Associative Memory. - Niloy Ganguly; Pradipta Maji; Biplab K. Sikdar; Parimal Pal Chaudhuri (Int. J. Pattern Recognit. Artif. Intell., 2002)

Design of hierarchical cellular automata for on-chip test pattern generator. - Biplab K. Sikdar; Niloy Ganguly; Parimal Pal Chaudhuri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Efficient BIST design for sequential machines using FiF-FoF values in machine states. - Samir Roy; Ujjwal Maulik; Sanghamitra Bandyopadhyay; Subhadip Basu; Biplab Kumar Sikdar (ASP-DAC, 2003)

Non-Linear Celluar Automata Based PRPG Design (Without Prohibited Pattern Set) In Linear Time Complexity. - Sukanta Das; Anirban Kundu; Subhayan Sen; Biplab K. Sikdar; Parimal Pal Chaudhuri (Asian Test Symposium, 2003)

Power Conscious BIST Design for Sequential Circuits Using ghost-FSM. - Samir Roy; Biplab K. Sikdar (Asian Test Symposium, 2003)

Design Of A Universal BIST (UBIST) Structure. - Sukanta Das; Niloy Ganguly; Biplab K. Sikdar; Parimal Pal Chaudhuri (VLSI Design, 2003)

Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines. - Samir Roy; Ujjwal Maulik; Biplab K. Sikdar (VLSI Design, 2003)

Theory and Application of Cellular Automata For Pattern Classification. - Pradipta Maji; Chandrama Shaw; Niloy Ganguly; Biplab K. Sikdar; Parimal Pal Chaudhuri (Fundam. Informaticae, 2003)

Characterization of Reachable/Nonreachable Cellular Automata States. - Sukanta Das; Biplab K. Sikdar; Parimal Pal Chaudhuri (ACRI, 2004)

Cellular Automata Evolution for Distributed Data Mining. - Pradipta Maji; Biplab K. Sikdar; Parimal Pal Chaudhuri (ACRI, 2004)

Cellular Automata Evolution for Pattern Classification. - Pradipta Maji; Biplab K. Sikdar; Parimal Pal Chaudhuri (ACRI, 2004)

Cellular Automata Based Encompression Technology for Voice Data. - Chandrama Shaw; Pradipta Maji; Sourav Saha 001; Biplab K. Sikdar; Samir Roy; Parimal Pal Chaudhuri (ACRI, 2004)

An efficient design of non-linear CA based PRPG for VLSI circuit testing. - Sukanta Das; Debdas Dey; Subhayan Sen; Biplab K. Sikdar; Parimal Pal Chaudhuri (ASP-DAC, 2004)

Nonlinear CA Based Design of Test Set Generator Targeting Pseudo-Random Pattern Resistant Faults. - Sukanta Das; Anirban Kundu; Biplab K. Sikdar (Asian Test Symposium, 2004)

Nonlinear CA Based Scalable Design of On-Chip TPG for Multiple Cores. - Sukanta Das; Biplab K. Sikdar; Parimal Pal Chaudhuri (Asian Test Symposium, 2004)

CA Based Document Compression Technology. - Chandrama Shaw; Biplab K. Sikdar; N. C. Maiti (ICONIP, 2004)

Generation of test patterns without prohibited pattern set. - Biplab K. Sikdar; Niloy Ganguly; Parimal Pal Chaudhuri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Design and characterization of cellular automata based associative memory for pattern recognition. - Niloy Ganguly; Pradipta Maji; Biplab K. Sikdar; Parimal Pal Chaudhuri (IEEE Trans. Syst. Man Cybern. Part B, 2004)

Cost Optimal Design of Nonlinear CA based PRPG for Test Applications. - Sukanta Das; Hafizur Rahaman 001; Biplab K. Sikdar (Asian Test Symposium, 2005)

Synthesis of Testable Finite State Machine Through Decomposition. - Biplab K. Sikdar; Arijit Sarkar; Samir Roy; Debesh K. Das (Asian Test Symposium, 2005)

Non-linear cellular automata based design of query processor for mobile network. - Sukanta Das; Sipra Das Bit; Biplab K. Sikdar (SMC, 2005)

Cellular Automata Based Test Structures with Logic Folding. - Biplab K. Sikdar; Sukanta Das; Samir Roy; Niloy Ganguly; Debesh K. Das (VLSI Design, 2005)

Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time. - Sukanta Das; Anirban Kundu; Biplab K. Sikdar; Parimal Pal Chaudhuri (J. Electron. Test., 2005)

A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area. - Biplab K. Sikdar; Samir Roy; Debesh K. Das (J. Electron. Test., 2005)

Fault diagnosis of VLSI circuits with cellular automata based pattern classifier. - Biplab K. Sikdar; Niloy Ganguly; Parimal Pal Chaudhuri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Classification of CA Rules Targeting Synthesis of Reversible Cellular Automata. - Sukanta Das; Biplab K. Sikdar (ACRI, 2006)

Cellular Automata Based Encoding Technique for Wavelet Transformed Data Targeting Still Image Compression. - Chandrama Shaw; Sukanta Das; Biplab K. Sikdar (ACRI, 2006)

Study of N-Detectability in QCA Designs. - Biplab K. Sikdar (ATS, 2006)

An Energy Effilcient Monitoring of Ad-Hoc Sensor Network with Cellular Automata. - Indrajit Banerjee; Sukanta Das; Hafizur Rahaman 001; Biplab K. Sikdar (SMC, 2006)

CA Based Data Servicing In Cellular Mobile Network. - Sukanta Das; DasBit Sipra; Biplab K. Sikdar (ICWN, 2007)

Cellular Automata Model for Cost Optimal Design of Steel Building Frames. - Debashis Moitra; Sandip Dhar; J. M. Mallick; Biplab K. Sikdar (IICAI, 2007)

Transition Fault Testability in Bit Parallel Multipliers over GF(2^{m}). - Hafizur Rahaman 001; Jimson Mathew; Biplab K. Sikdar; Dhiraj K. Pradhan (VTS, 2007)

Characterization of Non-reachable States in Irreversible CAState Space. - Sukanta Das; Biplab K. Sikdar (ACRI, 2008)

Exploring CAState Space to Synthesize Cellular Automata with Specified Attractor Set. - Sukanta Das; Chandrama Shaw; Biplab K. Sikdar (ACRI, 2008)

Exploring Cycle Structures of Additive Cellular Automata. - Niloy Ganguly; Biplab K. Sikdar; Parimal Pal Chaudhuri (Fundam. Informaticae, 2008)

Cellular Automata Based Design of Cost Optimal Steel Building Frames. - Debashis Moitra; Sandip Dhar; J. M. Mallick; S. Sadhu; Biplab K. Sikdar (Fundam. Informaticae, 2008)

CA Based Built-In Self-Test Structure for SoC. - Sukanta Das; Biplab K. Sikdar (Asian Test Symposium, 2009)

CA Rules Identification for Efficient Design of Pattern Classifier. - Sukanta Das; Nazma Naskar; Sukanya Mukherjee; Biplab K. Sikdar (CSC, 2009)

Modeling Single Length Cycle Nonlinear Cellular Automata for Pattern Recognition. - Sukanta Das; Sukanya Mukherjee; Nazma Naskar; Biplab K. Sikdar (NaBIC, 2009)

Cost Optimal Design of 3-D Steel Building Frames using CA-LFSR. - Debashis Moitra; Prosenjit Das; Pushan Mitra; Biplab Kumar Sikdar (NaBIC, 2009)

A Cellular Automata Based Model for Traffic in Congested City. - Sukanta Das; Meghnath Saha; Biplab Kumar Sikdar (SMC, 2009)

Quick Consensus Through Early Disposal of Faulty Processes. - Biplab Kumar Sikdar; Mamata Dalui; Bidesh Chakraborty (SMC, 2009)

Characterization of Single Cycle CA and its Application in Pattern Classification. - Sukanta Das; Sukanya Mukherjee; Nazma Naskar; Biplab K. Sikdar (AUTOMATA, 2009)

Characterization of 1-d Periodic Boundary Reversible CA. - Sukanta Das; Biplab K. Sikdar (AUTOMATA, 2009)

Characterization of CA Rules for SACA Targeting Detection of Faulty Nodes in WSN. - Sukanta Das; Nazma Naskar; Sukanya Mukherjee; Mamata Dalui; Biplab K. Sikdar (ACRI, 2010)

Programmable Cellular Automata (PCA) Based Advanced Encryption Standard (AES) Hardware Architecture. - Nirmalya Sundar Maiti; Soumyabrata Ghosh; Biplab K. Sikdar; Parimal Pal Chaudhuri (ACRI, 2010)

Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit. - Bibhash Sen; Anik Sengupta; Mamata Dalui; Biplab K. Sikdar (DSD, 2010)

Introducing universal QCA logic gate for synthesizing symmetric functions with minimum wire-crossings. - Bibhash Sen; Mamata Dalui; Biplab K. Sikdar (ICWET, 2010)

SSMCA: CA based Segmented Sensor Network Management scheme. - Indrajit Banerjee; Sukanta Das; Hafizur Rahaman 001; Biplab K. Sikdar; Mamata Dalui (SMC, 2010)

CA based quick consensus in distributed system through network partitioning. - Mamata Dalui; Suhrid Bakshi; Biplab K. Sikdar (SMC, 2010)

A Scalable Test Structure for Multicore Chip. - Sukanta Das; Biplab K. Sikdar (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

DFDNM: A Distributed Fault Detection and Node Management Scheme for Wireless Sensor Network. - Indrajit Banerjee; Prasenjit Chanak; Biplab Kumar Sikdar; Hafizur Rahaman 001 (ACC (3), 2011)

Exploring Impact of Faults on Branch Predictors' Power for Diagnosis of Faulty Module. - Gunjan Bhattacharya; Ilora Maity; Biplab K. Sikdar; Baisakhi Das (Asian Test Symposium, 2011)

An Efficient Test Design for Verification of Cache Coherence in CMPs. - Mamata Dalui; Biplab K. Sikdar (DASC, 2011)

Impact of Inaccurate Design of Branch Predictors on Processors' Power Consumption. - Baisakhi Das; Gunjan Bhattacharya; Ilora Maity; Biplab K. Sikdar (DASC, 2011)

Synthesis of Reversible Universal Logic around QCA with Online Testability. - Bibhash Sen; Divyam Saran; Mousumi Saha; Biplab K. Sikdar (ISED, 2011)

A cellular automata based scheme for diagnosis of faulty nodes in WSN. - Ilora Maity; Gunjan Bhattacharya; Sukanta Das; Biplab K. Sikdar (SMC, 2011)

On Invertible Three Neighborhood Null-Boundary Uniform Cellular Automata. - Soumyabrata Ghosh; Nirmalya Sundar Maiti; Parimal Pal Chaudhuri; Biplab K. Sikdar (Complex Syst., 2011)

Counting Cycles in Reversible Cellular Automata. - Sukanta Das; Avik Chakraborty; Biplab K. Sikdar (ACRI, 2012)

Synthesis of Reversible Asynchronous Cellular Automata for Pattern Generation with Specific Hamming Distance. - Sukanta Das; Anindita Sarkar; Biplab K. Sikdar (ACRI, 2012)

A Cellular Automata Based Scheme for Energy Efficient Fault Diagnosis in WSN. - Nasiruddin Khan; Ilora Maity; Sukanta Das; Biplab K. Sikdar (ACRI, 2012)

A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol. - Mamata Dalui; Biplab K. Sikdar (ISED, 2012)

High Speed Hardware for March C¯. - Mousumi Saha; Souvik Das; Biplab K. Sikdar (ISED, 2012)

Design of Fault Tolerant Reversible Arithmetic Logic Unit in QCA. - Bibhash Sen; Manojit Dutta; Debajyoty Banik; Dipak K. Singh; Biplab K. Sikdar (ISED, 2012)

An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol. - Mamata Dalui; Biplab K. Sikdar (VDAT, 2012)

An Efficient Multiplexer in Quantum-dot Cellular Automata. - Bibhash Sen; Manojit Dutta; Divyam Saran; Biplab K. Sikdar (VDAT, 2012)

Rule Vector Graph (RVG) To Design Linear Time Algorithm for Identifying the Invertibility of Periodic-Boundary Three Neighborhood Cellular Automata. - Nirmalya Sundar Maiti; Soumyabrata Ghosh; Biplab K. Sikdar; Parimal Pal Chaudhuri (J. Cell. Autom., 2012)

Characterization of Nonlinear Cellular Automata Having Only Single Length Cycle Attractors. - Nazma Naskar; Sukanta Das; Biplab K. Sikdar (J. Cell. Autom., 2012)

Design of directory based cache coherence protocol verification logic in CMPs around TACA. - Mamata Dalui; Biplab K. Sikdar (HPCS, 2013)

A cellular automata based design of self testable hardware for March C-. - Saha Mousumi; Biplab K. Sikdar (HPCS, 2013)

Directory based cache coherence verification logic in CMPs cache system. - Mamata Dalui; Keshav Gupta; Biplab K. Sikdar (MES, 2013)

Design of an Efficient Scheme for Data Migration in Chip-Multiprocessors. - Baisakhi Das; Nirmalya Sundar Maiti; Sukanta Das; Mousumi Saha; Biplab K. Sikdar (ISED, 2013)

Design of Sequential Circuits in Multilayer QCA Structure. - Bibhash Sen; Mrinal Goswami; Samik Some; Biplab K. Sikdar (ISED, 2013)

Analysis and synthesis of nonlinear reversible cellular automata in linear time. - Sukanta Das; Biplab K. Sikdar (CoRR, 2013)

CA Based Scalable Protocol Processor for Chip Multiprocessors. - Mamata Dalui; Biplab K. Sikdar (ISED, 2014)

Design of Fault Tolerant Universal Logic in QCA. - Bibhash Sen; Rijoy Mukherjee; Rajdeep Kumar Nath; Biplab K. Sikdar (ISED, 2014)

Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU. - Bibhash Sen; Manojit Dutta; Samik Some; Biplab K. Sikdar (ACM J. Emerg. Technol. Comput. Syst., 2014)

Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability. - Bibhash Sen; Manojit Dutta; Mrinal Goswami; Biplab K. Sikdar (Microelectron. J., 2014)

Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing. - Bibhash Sen; Manojit Dutta; Biplab K. Sikdar (Microelectron. J., 2014)

A Cellular Automata Based Fault Tolerant Approach in Designing Test Hardware for L1 Cache Module. - Saha Mousumi; Biplab K. Sikdar (ISVLSI, 2015)

Design of coherence verification unit for heterogeneous CMPs. - Bidesh Chakraborty; Bhanu Pratap Singh; M. Chinnapureddy; Mamata Dalui; Biplab K. Sikdar (VDAT, 2015)

A fault tolerant test hardware for L1 cache module in tile CMPs architecture. - Saha Mousumi; Navneet Kumar Gautam; Biplab K. Sikdar (VDAT, 2015)

Fault masking in Quantum-dot cellular automata using prohibitive logic circuit. - Rajdeep Kumar Nath; Bibhash Sen; Rachit Daga; Nilesh Chakraborty; Harsh Tibrewal; Biplab K. Sikdar (VDAT, 2015)

Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers. - Bibhash Sen; Mrinal Goswami; Subhra Mazumdar 001; Biplab K. Sikdar (Comput. Electr. Eng., 2015)

Towards the hierarchical design of multilayer QCA logic circuit. - Bibhash Sen; Anirban Nag; Asmit De; Biplab K. Sikdar (J. Comput. Sci., 2015)

CA based protocol processor for heterogeneous CMPs. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (ISED, 2016)

MASI: An eviction aware cache coherence protocol for CMPs. - Mamata Dalui; Tannishtha Som; Shivani Bansal; Shivam Pant; Biplab K. Sikdar (ISED, 2016)

Design of CA based scheme for evenhanded data migration in CMPs. - Baisakhi Das; Supreeti Kamilya; Biplab K. Sikdar (ISED, 2016)

Design of low power 5-input majority voter in quantum-dot cellular automata with effective error resilience. - Mrinal Goswami; Bibhash Sen; Biplab K. Sikdar (ISED, 2016)

Cellular automata based fault tolerant resistive memory design. - Mousumi Saha; Sutapa Sarkar; Biplab K. Sikdar (ISED, 2016)

Design of coherence verification unit for CMPs realizing dragon protocol. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (VDAT, 2016)

Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect. - Bibhash Sen; Rajdeep Kumar Nath; Rijoy Mukherjee; Yashraj Sahu; Biplab K. Sikdar (VLSID, 2016)

A cellular automata based highly accurate memory test hardware realizing March C-. - Saha Mousumi; Mamata Dalui; Biplab K. Sikdar (Microelectron. J., 2016)

On the reliability of majority logic structure in quantum-dot cellular automata. - Bibhash Sen; Yashraj Sahu; Rijoy Mukherjee; Rajdeep Kumar Nath; Biplab K. Sikdar (Microelectron. J., 2016)

A Cache System Design for CMPs with Built-In Coherence Verification. - Mamata Dalui; Biplab K. Sikdar (VLSI Design, 2016)

Periodic boundary cellular automata based test structure for memory. - Mousumi Saha; Baisakhi Das; Biplab K. Sikdar (EWDTS, 2017)

Multi-bit fault tolerant design for resistive memories through dynamic partitioning. - Sutapa Sarkar; Mousumi Saha; Biplab K. Sikdar (EWDTS, 2017)

CIFR: A complete in-place fault remapping strategy for CMP cache using dynamic reuse distance. - Avishek Choudhury; Biplab K. Sikdar (ISED, 2017)

Performance Analysis of Disability Based Fault Tolerance Techniques for Permanent Faults in Chip Multiprocessors. - Avishek Choudhury; Biplab K. Sikdar (VDAT, 2017)

Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (VLSID, 2017)

Optimal synthesis of QCA logic circuit eliminating wire-crossings. - Rajdeep Kumar Nath; Bibhash Sen; Biplab K. Sikdar (IET Circuits Devices Syst., 2017)

Evaluating impact on CMPs' power for design inaccuracy diagnosis. - Baisakhi Das; Biplab K. Sikdar (Int. J. Comput. Appl. Technol., 2017)

A cellular automata based self-correcting protocol processor for scalable CMPs. - Mamata Dalui; Biplab K. Sikdar (Microelectron. J., 2017)

Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic. - Mrinal Goswami; Bibhash Sen; Rijoy Mukherjee; Biplab K. Sikdar (Microelectron. J., 2017)

Evaluation of Misspeculation Impact on Chip-Multiprocessors Power Overhead. - Baisakhi Das; Mamata Dalui; Anupama Mondal; Salma Mandi; Nilanjana Das; Biplab K. Sikdar (ICSCA, 2018)

ReMiT: Redundancy Migration for Latency Aware Fault Tolerant Cache Design in Multicore. - Avishek Choudhury; Brototi Mondal; Biplab K. Sikdar (ISED, 2018)

Stuck-At 0/1 Trojans on Return Address Stack. - Baisakhi Das; Nilanjana Das; Biplab K. Sikdar (ISED, 2018)

Hard to Detect Combinational Hardware Trojans. - Nilanjana Das; Mousumi Saha; Biplab K. Sikdar (ISED, 2018)

Modeling & Analysis of Redundancy Based Fault Tolerance for Permanent Faults in Chip Multiprocessor Cache. - Avishek Choudhury; Biplab K. Sikdar (VLSID, 2018)

Design of a Reliable Cache System for Heterogeneous CMPs. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (J. Circuits Syst. Comput., 2018)

Latency Aware Fault Tolerant Cache in Multicore Using Dynamic Remapping Clusters. - Avishek Choudhury; Brototi Mondal; Biplab K. Sikdar (ATS, 2019)

CORE-VR: A Coherence and Reusability Aware Low Voltage Fault Tolerant Cache in Multicore. - Avishek Choudhury; Biplab K. Sikdar (DFT, 2019)

Soft Error Resilience in Chip Multiprocessor Cache using a Markov Model Based Re-usability Predictor. - Avishek Choudhury; Biplab K. Sikdar (ICCD, 2019)

Effect of Trojans on Write Data Access in Memory. - Baisakhi Das; Nilanjana Das; Biplab K. Sikdar (ISED, 2019)

SACAs: (Non-uniform) Cellular Automata that Converge to a Single Fixed Point. - Supreeti Kamilya; Sumit Adak; Sukanta Das; Biplab K. Sikdar (J. Cell. Autom., 2019)

Cellular Automata Based Test Design for Coherence Verification in 3D Caches. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (J. Circuits Syst. Comput., 2019)

Exploring Hard to Detect Sequential Hardware Trojans. - Nilanjana Das; Joy Halder; Baisakhi Das; Biplab K. Sikdar (VDAT, 2020)

Evaluation of Face Recognition Schemes for Low-computation IoT System Design. - Jayanta Paul; Rajat Subhra Bhowmick; Riom Sen; Dwaipayan Ray; Suman S. Manjhi; Soumya Sen; Biplab K. Sikdar (VDAT, 2020)

Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration. - Avishek Choudhury; Biplab K. Sikdar (J. Electron. Test., 2020)

Synthesis of Scalable Single Length Cycle, Single Attractor Cellular Automata in Linear Time. - Bidesh Chakraborty; Mamata Dalui; Biplab K. Sikdar (Complex Syst., 2021)

Simulation of Non-uniform Cellular Automata by Classical Cellular Automata and Its Application in Embedded Systems. - Supreeti Kamilya; Sukanta Das; Biplab K. Sikdar (J. Cell. Autom., 2021)

A trojan framework in AES core to evade state-of-the-art HT detection schemes. - Nilanjana Das; Riom Sen; Dwaipayan Ray; Nandini Banerjee; Joy Halder; Hannu Tenhunen; Biplab K. Sikdar (Microelectron. J., 2021)

Identification of Periodic Boundary SACA Rules Exploring NSRT Diagram. - Baisakhi Das; Mousumi Saha; Nilanjana Das; Biplab K. Sikdar (ACRI, 2022)

Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach. - Amit Kumar Pramanik; Jayanta Pal; Biplab K. Sikdar; Bibhash Sen (ACRI, 2022)

Cellular automata based multi-bit stuck-at fault diagnosis for resistive memory. - Sutapa Sarkar; Biplab Kumar Sikdar; Mousumi Saha (Frontiers Inf. Technol. Electron. Eng., 2022)

Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor. - Avishek Choudhury; Brototi Mondal; Kolin Paul; Biplab K. Sikdar (Microprocess. Microsystems, 2023)

LLC Block Reuse Predictor Design using Deep Learning to Mitigate Soft Error in Multicore. - Avishek Choudhury; Brototi Mondal; Kolin Paul; Biplab K. Sikdar (VLSID, 2024)

Exploring Periodic Boundary Cellular Automaton Rules for One and Two Fixed Points. - Baisakhi Das; Mamata Dalui; Mousumi Saha; Kasturi Ghosh; Nilanjana Das; Biplab K. Sikdar (Complex Syst., 2024)

CAPUF: Design of a configurable circular arbiter PUF with enhanced security and hardware efficiency. - Mahabub Hasan Mahalat; Shyam Subba; Anindan Mondal; Biplab K. Sikdar; Rajat Subhra Chakraborty; Bibhash Sen (Integr., 2024)

In-Memory Sorting-Searching with Cayley Tree. - Subrata Paul; Sukanta Das; Biplab K. Sikdar (CoRR, 2025)