A Flexible Scheme for State Assignment Based on Characteristics of the FSM. - Biswadip Mitra; Preeti Ranjan Panda; Parimal Pal Chaudhuri (ICCAD, 1991)

Synthesis of Self-Testable Sequential Logic Using Programmable Cellular Automata. - Susanta Misra; Biswadip Mitra; S. Sengupta; Parimal Pal Chaudhuri (VLSI Design, 1992)

Combined Synthesis of Easily Testable Datapath and Control Designs. - Biswadip Mitra; Parimal Pal Chaudhuri (VLSI Design, 1992)

An Efficient State Assignment Technique using Least Commitment and Constraint Propagation Techniques. - Biswadip Mitra; Parimal Pal Chaudhuri (VLSI Design, 1992)

A Novel Scheme for Synthesis of Easily Testable Finite State Machines Using Cellular Automata. - Susanta Misra; Biswadip Mitra; Parimal Pal Chaudhuri (VLSI Design, 1993)

A Scheme for Synthesizing Testable VLSI Designs with Minimum Area Overhead. - Biswadip Mitra; Parimal Pal Chaudhuri (VLSI Design, 1993)

Estimating the Complexity of Synthesized Designs from FSM Specifications. - Biswadip Mitra; Preeti Ranjan Panda; Parimal Pal Chaudhuri (IEEE Des. Test Comput., 1993)

An Integrated Approach to State Assignment and Sequential Element Selection for FSM Synthesis. - Mahesh Mehendale; Biswadip Mitra (VLSI Design, 1994)

Spatial frequency based motion estimation for image sequence compression. - Vinod Menezes; Soumitra Kumar Nandy; Biswadip Mitra (HiPC, 1996)

Signal compression through spatial frequency-based motion estimation. - Vinod Menezes; S. K. Nandy 001; Biswadip Mitra (Integr., 1997)

Consumer Digitization: Accelerating DSP Applications, Growing VLSI Design Challenges. - Biswadip Mitra (ASP-DAC/VLSI Design, 2002)