A RAM-based neural network for collision avoidance in a mobile robot. - Qiang Yao; Daryl G. Beetner; Donald C. Wunsch II; Björn Osterloh (IJCNN, 2003)

Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. - Björn Osterloh; Harald Michalik; Björn Fiethe; Frank Bubenhagen (AHS, 2007)

Reconfigurable system-on-chip data processing units for space imaging instruments. - Björn Fiethe; Harald Michalik; C. Dierker; Björn Osterloh; Gang Zhou (DATE, 2007)

SoCWire: A Network-on-Chip Approach for Reconfigurable System-on-Chip Designs in Space Applications. - Björn Osterloh; Harald Michalik; Björn Fiethe; Karel Kotarowski (AHS, 2008)

Dynamic Partial Reconfiguration in Space Applications. - Björn Osterloh; Harald Michalik; Sandi Habinc; Björn Fiethe (AHS, 2009)

SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs. - Björn Osterloh; Harald Michalik; Björn Fiethe (ARCS, 2009)

Architecture verification of the SoCWire NoC approach for safe dynamic partial reconfiguration in space applications. - Björn Osterloh; Harald Michalik; Björn Fiethe; Frank Bubenhagen (AHS, 2010)

AMBA to SoCWire network on Chip bridge as a backbone for a Dynamic Reconfigurable Processing unit. - Holger Michel; Frank Bubenhagen; Björn Fiethe; Harald Michalik; Björn Osterloh; Wayne Sullivan; Alex Wishart; Jørgen Ilstad; Sandi Habinc (AHS, 2011)