A full characterization of single pitch IO ESD protection based on silicon controlled rectifier and dynamic trigger circuit in CMOS 32 nm node. - J. Bourgeat; Philippe Galy; A. Dray; Jean Jimenez; D. Marin-Cudraz; Blaise Jacquier (Microelectron. Reliab., 2011)

Reliability impact due to high current, lattice and hot carriers temperatures on β(2×2) matrix ESD power devices for advanced CMOS technologies. - Philippe Galy; J. Bourgeat; Jean Jimenez; Blaise Jacquier; D. Marin-Cudraz; Sylvain Dudit (Microelectron. Reliab., 2011)

Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology. - Philippe Galy; Johan Bourgeat; Jean Jimenez; Nicolas Guitard; Alexandre Dray; Ghislain Troussier; Blaise Jacquier; David Marin-Cudraz (Microelectron. Reliab., 2012)

Simulation, characterization and implementation of a new SCR-based device with a turn-off capability for EOS-immune ESD power supply clamps in advanced CMOS technology nodes. - Jorge Loayza; Nicolas Guitard; Bruno Allard; Luong-Viêt Phung; Blaise Jacquier; Philippe Galy (Microelectron. Reliab., 2018)

Estimation of Oxide Breakdown Voltage During a CDM Event Using Very Fast Transmission Line Pulse and Transmission Line Pulse Measurements. - Chloe Troussier; Johan Bourgeat; Blaise Jacquier; Emmanuel Simeu; Jean-Daniel Arnould (IRPS, 2021)