Dynamic Scheduling Rule Selection for Semiconductor Wafer Fabrication. - Bo-Wei Hsieh; Shi-Chung Chang; Chun-Hung Chen (ICRA, 2001)

Scheduling semiconductor wafer fabrication by using ordinal optimization-based simulation. - Bo-Wei Hsieh; Chun-Hung Chen; Shi-Chung Chang (IEEE Trans. Robotics Autom., 2001)

Efficient Selection of Scheduling Rule Combination by Combining Design of Experiment and Ordinal Optimization-Based Simulation. - Bo-Wei Hsieh; Shi-Chung Chang; Chun-Hung Chen (ICRA, 2003)

Efficient Simulation-Based Composition of Scheduling Policies by Integrating Ordinal Optimization With Design of Experiment. - Bo-Wei Hsieh; Chun-Hung Chen; Shi-Chung Chang (IEEE Trans Autom. Sci. Eng., 2007)

26.6 A 2.667Gb/s DDR3 memory interface with asymmetric ODT on wirebond package and single-side-mounted PCB. - Shang-Ping Chen; Chih-Chien Hung; Qui-Ting Chen; Sheng-Ming Chang; Ming-Shi Liou; Bo-Wei Hsieh; Hsiang-I Huang; Brian Liu; Yan-Bin Luo (ISSCC, 2014)