Deterministic broadside test generation for transition path delay faults. - Bo Yao 002; Irith Pomeranz; Sudhakar M. Reddy (ACM Great Lakes Symposium on VLSI, 2010)

Path selection based on static timing analysis considering input necessary assignments. - Bo Yao 002; Arani Sinha; Irith Pomeranz (VTS, 2013)

Transition faults and transition path delay faults: Test generation, path selection, and built-in generation of functional broadside tests - Bo Yao 002 (2013)

Built-in generation of functional broadside tests considering primary input constraints. - Bo Yao 002; Irith Pomeranz; Srikanth Venkataraman; M. Enamul Amyeen (ACM Great Lakes Symposium on VLSI, 2014)

Functional Broadside Test Generation Using a Commercial ATPG Tool. - Naixing Wang; Bo Yao 002; Xijiang Lin; Irith Pomeranz (ISVLSI, 2017)