Bo-Yuan Huang

Orcid: 0000-0001-7069-4069

Affiliations:
  • Princeton University, Department of Electrical Engineering, NJ, USA
  • National Taiwan University, Taipei, Taiwan (former)


According to our database1, Bo-Yuan Huang authored at least 13 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2024
Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface.
ACM Trans. Design Autom. Electr. Syst., March, 2024

2023
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface.
CoRR, 2022

2021
Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2020
Intelligent REST API data fuzzing.
Proceedings of the ESEC/FSE '20: 28th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2020

2019
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification.
ACM Trans. Design Autom. Electr. Syst., 2019

ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2019

2018
Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A formal instruction-level GPU model for scalable verification.
Proceedings of the International Conference on Computer-Aided Design, 2018

Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Protocol Design and Game Theoretic Solutions for Device-to-Device Radio Resource Allocation.
IEEE Trans. Veh. Technol., 2017

2015
Asynchronous QDI Circuit Synthesis from Signal Transition Protocols.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014
Resource allocation in D2D communication - A game theoretic approach.
Proceedings of the IEEE International Conference on Communications, 2014


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