A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13-µm CMOS. - Afshin Momtaz; David Chung; Namik Kocaman; Jun Cao 001; Mario Caresosa; Bo Zhang 029; Ichiro Fujimori (IEEE J. Solid State Circuits, 2007)

21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber. - Jun Cao 001; Bo Zhang 029; Ullas Singh; Delong Cui; Anand Vasani; Adesh Garg; Wei Zhang; Namik Kocaman; Deyi Pi; Bharath Raghavan; Hui Pan 002; Ichiro Fujimori; et al. (ISSCC, 2009)

A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber. - Jun Cao 001; Bo Zhang 029; Ullas Singh; Delong Cui; Anand Vasani; Adesh Garg; Wei Zhang; Namik Kocaman; Deyi Pi; Bharath Raghavan; Hui Pan 002; Ichiro Fujimori; et al. (IEEE J. Solid State Circuits, 2010)

11.3Gb/s CMOS SONET-compliant transceiver for both RZ and NRZ applications. - Namik Kocaman; Adesh Garg; Bharath Raghavan; Delong Cui; Anand Vasani; Keith Tang; Deyi Pi; Haitao Tong; Siavash Fallahi; Wei Zhang; Ullas Singh; Jun Cao 001; et al. (ISSCC, 2011)

11.3 Gbps CMOS SONET Compliant Transceiver for Both RZ and NRZ Applications. - Namik Kocaman; Adesh Garg; Bharath Raghavan; Delong Cui; Anand Vasani; Keith Tang; Deyi Pi; Haitao Tong; Siavash Fallahi; Wei Zhang; Ullas Singh; Jun Cao 001; et al. (IEEE J. Solid State Circuits, 2011)

A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission. - Delong Cui; Bharath Raghavan; Ullas Singh; Anand Vasani; Zhi Chao Huang; Deyi Pi; Mehdi Khanpour; Ali Nazemi; Hassan Maarefi; Tamer A. Ali 001; Nick Huang; Wei Zhang; et al. (ISSCC, 2012)

A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission. - Delong Cui; Bharath Raghavan; Ullas Singh; Anand Vasani; Zhi Chao Huang; Deyi Pi; Mehdi Khanpour; Ali Nazemi; Hassan Maarefi; Wei Zhang; Tamer A. Ali 001; Nick Huang; et al. (IEEE J. Solid State Circuits, 2012)

A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS. - Bo Zhang 029; Ali Nazemi; Adesh Garg; Namik Kocaman; Mahmoud Reza Ahmadi; Mehdi Khanpour; Heng Zhang; Jun Cao 001; Afshin Momtaz (ISSCC, 2013)

Standing wave based clock distribution technique with application to a 10 × 11 Gbps transceiver in 28 nm CMOS. - Guansheng Li; Wooram Lee; Delong Cui; Bo Zhang 029; Afshin Momtaz; Jun Cao 001 (A-SSCC, 2015)

3.4 A 36Gb/s PAM4 transmitter using an 8b 18GS/S DAC in 28nm CMOS. - Ali Nazemi; Kangmin Hu; Burak Çatli; Delong Cui; Ullas Singh; Tim He; Zhi Chao Huang; Bo Zhang 029; Afshin Momtaz; Jun Cao 001 (ISSCC, 2015)

3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOS. - Bo Zhang 029; Karapet Khanoyan; Hamid Hatamkhani; Haitao Tong; Kangmin Hu; Siavash Fallahi; Kambiz Vakilian; Anthony Brewster (ISSCC, 2015)

A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS. - Bo Zhang 029; Karapet Khanoyan; Hamid Hatamkhani; Haitao Tong; Kangmin Hu; Siavash Fallahi; Mohammed M. Abdul-Latif; Kambiz Vakilian; Ichiro Fujimori; Anthony Brewster (IEEE J. Solid State Circuits, 2015)

A 40 nm CMOS 195 mW/55 mW Dual-Path Receiver AFE for Multi-Standard 8.5-11.5 Gb/s Serial Links. - Bo Zhang 029; Ali Nazemi; Adesh Garg; Namik Kocaman; Mahmoud Reza Ahmadi; Mehdi Khanpour; Heng Zhang; Jun Cao 001; Afshin Momtaz (IEEE J. Solid State Circuits, 2015)

3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS. - Delong Cui; Heng Zhang; Nick Huang; Ali Nazemi; Burak Çatli; Hyo-Gyuem Rhew; Bo Zhang 029; Afshin Momtaz; Jun Cao 001 (ISSCC, 2016)

A 125 mW 8.5-11.5 Gb/s serial link transceiver with a dual path 6-bit ADC/5-tap DFE receiver and a 4-tap FFE transmitter in 28 nm CMOS. - Bharath Raghavan; Aida Varzaghani; Lakshmi P. Rao; Henry Park; Xiaochen Yang; Zhi Huang; Yu Chen; Rama Kattamuri; Chunhui Wu; Bo Zhang 029; Jun Cao 001; Afshin Momtaz; et al. (VLSI Circuits, 2016)

A 3.8 mW/Gbps Quad-Channel 8.5-13 Gbps Serial Link With a 5 Tap DFE and a 4 Tap Transmit FFE in 28 nm CMOS. - Namik Kocaman; Tamer A. Ali 001; Lakshmi P. Rao; Ullas Singh; Mohammed M. Abdul-Latif; Yang Liu; Amr Amin Hafez; Henry Park; Anand Vasani; Zhi Huang; Arvindh Iyer; Bo Zhang 029; et al. (IEEE J. Solid State Circuits, 2016)

29.2 A transmitter and receiver for 100Gb/s coherent networks with integrated 4×64GS/s 8b ADCs and DACs in 20nm CMOS. - Jun Cao 001; Delong Cui; Ali Nazemi; Tim He; Guansheng Li; Burak Çatli; Mehdi Khanpour; Kangmin Hu; Tamer A. Ali 001; Heng Zhang; Hairong Yu; Ben Rhew; et al. (ISSCC, 2017)

An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology. - Namik Kocaman; Ullas Singh; Bharath Raghavan; Arvindh Iyer; Kumar Thasari; Saurabh Surana; Jun Won Jung; Jaehun Jeong; Heng Zhang; Anand Vasani; Yonghyun Shim; Zhi Huang; et al. (ISSCC, 2022)

A 112Gb/s Serial Link Transceiver With 3-tap FFE and 18-tap DFE Receiver for up to 43dB Insertion Loss Channel in 7nm FinFET Technology. - Bo Zhang 029; Anand Vasani; Ashutosh Sinha; Alireza Nilchi; Haitao Tong; Lakshmi P. Rao; Karapet Khanoyan; Hamid Hatamkhani; Xiaochen Yang; Xin Meng; Alexander Wong; Jun Kim; et al. (ISSCC, 2023)

18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOS. - Guansheng Li; Adesh Garg; Tim He; Ullas Singh; Jiawen Zhang; Lakshmi P. Rao; Chang Liu; Meisam Honarvar Nazari; Yang Liu; Yong Liu; Heng Zhang; Tamer A. Ali 001; et al. (ISSCC, 2024)

A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology. - Bo Zhang 029; Anand Vasani; Ashutosh Sinha; Alireza Nilchi; Haitao Tong; Lakshmi P. Rao; Karapet Khanoyan; Hamid Hatamkhani; Xiaochen Yang; Xin Meng; Alexander Wong; Jun Kim; et al. (IEEE J. Solid State Circuits, 2024)