An FPGA-specific approach to floating-point accumulation and sum-of-products. - Florent de Dinechin; Bogdan Pasca 001; Octavian Cret; Radu Tudoran (FPT, 2008)

Generating high-performance custom floating-point pipelines. - Florent de Dinechin; Cristian Klein; Bogdan Pasca 001 (FPL, 2009)

Large multipliers with fewer DSP blocks. - Florent de Dinechin; Bogdan Pasca 001 (FPL, 2009)

Automatic generation of polynomial-based hardware architectures for function evaluation. - Florent de Dinechin; Mioara Joldes; Bogdan Pasca 001 (ASAP, 2010)

Multiplicative Square Root Algorithms for FPGAs. - Florent de Dinechin; Mioara Joldes; Bogdan Pasca 001; Guillaume Revy (FPL, 2010)

Pipelined FPGA Adders. - Florent de Dinechin; Hong Diep Nguyen; Bogdan Pasca 001 (FPL, 2010)

Floating-point exponential functions for DSP-enabled FPGAs. - Florent de Dinechin; Bogdan Pasca 001 (FPT, 2010)

Multipliers for floating-point double precision and beyond on FPGAs. - Sebastian Banescu; Florent de Dinechin; Bogdan Pasca 001; Radu Tudoran (SIGARCH Comput. Archit. News, 2010)

Automatic Generation of FPGA-Specific Pipelined Accelerators. - Christophe Alias; Bogdan Pasca 001; Alexandru Plesco (ARC, 2011)

An FPGA architecture for solving the Table Maker's Dilemma. - Florent de Dinechin; Jean-Michel Muller; Bogdan Pasca 001; Alexandru Plesco (ASAP, 2011)

FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. - Hong Diep Nguyen; Bogdan Pasca 001; Thomas B. Preußer (FPL, 2011)

Designing Custom Arithmetic Data Paths with FloPoCo. - Florent de Dinechin; Bogdan Pasca 001 (IEEE Des. Test Comput., 2011)

High-performance floating-point computing on reconfigurable circuits. (Calcul flottant haute performance sur circuits reconfigurables). - Bogdan Mihai Pasca 001 (2011)

Correctly rounded floating-point division for DSP-enabled FPGAs. - Bogdan Pasca 001 (FPL, 2012)

FPGA-specific synthesis of loop-nests with pipelined computational cores. - Christophe Alias; Bogdan Pasca 001; Alexandru Plesco (Microprocess. Microsystems, 2012)

Elementary Function Implementation with Optimized Sub Range Polynomial Evaluation. - Martin Langhammer; Bogdan Pasca 001 (FCCM, 2013)

Faithful single-precision floating-point tangent for FPGAs. - Martin Langhammer; Bogdan Pasca 001 (FPGA, 2013)

Efficient floating-point polynomial evaluation on FPGAS. - Martin Langhammer; Bogdan Pasca 001 (FPL, 2013)

Floating-Point Exponentiation Units for Reconfigurable Computing. - Florent de Dinechin; Pedro Echeverría; Marisa López-Vallejo; Bogdan Pasca 001 (ACM Trans. Reconfigurable Technol. Syst., 2013)

Low-cost multiplier-based FPU for embedded processing on FPGA. - Bogdan Pasca 001 (FPL, 2014)

Tools and Techniques for Efficient High-Level System Design on FPGAs. - Adrian J. Chung; Kathryn Cobden; Mark Jervis; Martin Langhammer; Bogdan Pasca 001 (CoRR, 2014)

Design and Implementation of an Embedded FPGA Floating Point DSP Block. - Martin Langhammer; Bogdan Pasca 001 (ARITH, 2015)

Floating-Point DSP Block Architecture for FPGAs. - Martin Langhammer; Bogdan Pasca 001 (FPGA, 2015)

High-Level Design Tools for Floating Point FPGAs. - Deshanand P. Singh; Bogdan Pasca 001; Tomasz S. Czajkowski (FPGA, 2015)

Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs. - Martin Langhammer; Bogdan Pasca 001 (ARITH, 2016)

Flexible Fixed-Point Function Generation for FPGAs. - Matei Istoan; Bogdan Pasca 001 (ARITH, 2017)

Floating Point Tangent Implementation for FPGAs. - Martin Langhammer; Bogdan Pasca 001 (ARITH, 2017)

Model-based hardware design based on compatible sets of isomorphic subgraphs. - Patrick Sittel; Konrad Möller; Martin Kumm; Peter Zipf; Bogdan Pasca 001; Mark Jervis (FPT, 2017)

Single Precision Logarithm and Exponential Architectures for Hard Floating-Point Enabled FPGAs. - Martin Langhammer; Bogdan Pasca 001 (IEEE Trans. Computers, 2017)

High-Performance QR Decomposition for FPGAs. - Martin Langhammer; Bogdan Pasca 001 (FPGA, 2018)

Activation Function Architectures for FPGAs. - Bogdan Pasca 001; Martin Langhammer (FPL, 2018)

Hybrid Dot-Product Design for FP-Enabled FPGAs. - Bogdan Pasca 001 (ARITH, 2019)

High Precision, High Performance FPGA Adders. - Martin Langhammer; Bogdan Pasca 001; Gregg Baeckler (FCCM, 2019)

Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs. - Eriko Nurvitadhi; Dongup Kwon; Ali Jafari; Andrew Boutros; Jaewoong Sim; Phillip Tomson; Huseyin Sumbul; Gregory K. Chen; Phil C. Knag; Raghavan Kumar; Ram Krishnamurthy 001; Sergey Gribok; et al. (FCCM, 2019)

Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI. - Eriko Nurvitadhi; Dongup Kwon; Ali Jafari; Andrew Boutros; Jaewoong Sim; Phillip Tomson; Huseyin Sumbul; Gregory K. Chen; Phil C. Knag; Raghavan Kumar; Ram Krishnamurthy 001; Debbie Marr; et al. (FPGA, 2019)

Extracting INT8 Multipliers from INT18 Multipliers. - Martin Langhammer; Bogdan Pasca 001; Gregg Baeckler; Sergey Gribok (FPL, 2019)

BFLOAT MLP Training Accelerator for FPGAs. - Andrei Hagiescu; Martin Langhammer; Bogdan Pasca 001; Philip Colangelo; Jason Thong; Niayesh Ilkhani (ReConFig, 2019)

Stratix 10 NX Architecture and Applications. - Martin Langhammer; Eriko Nurvitadhi; Bogdan Pasca 001; Sergey Gribok (FPGA, 2021)

Folded Integer Multiplication for FPGAs. - Martin Langhammer; Bogdan Pasca 001 (FPGA, 2021)

Efficient FPGA Modular Multiplication Implementation. - Martin Langhammer; Bogdan Pasca 001 (FPGA, 2021)

Dense FPGA Compute Using Signed Byte Tuples. - Martin Langhammer; Simon Finn; Sergey Gribok; Bogdan Pasca 001 (FPL, 2021)

Efficient Floating-Point Implementation of the Probit Function on FPGAs. - Mioara Joldes; Bogdan Pasca 001 (J. Signal Process. Syst., 2021)

Low-Latency Modular Exponentiation for FPGAs. - Martin Langhammer; Sergey Gribok; Bogdan Pasca 001 (FCCM, 2022)

Guest Editorial: Special Section on Emerging and Impacting Trends on Computer Arithmetic. - Stuart F. Oberman; Leonel Sousa; Bogdan Pasca 001; Alberto Nannarelli (IEEE Trans. Emerg. Top. Comput., 2022)

Stratix 10 NX Architecture. - Martin Langhammer; Eriko Nurvitadhi; Sergey Gribok; Bogdan Pasca 001 (ACM Trans. Reconfigurable Technol. Syst., 2022)

Extracting low-precision floating-point adders from embedded hard FP DSP Blocks on FPGAs. - Bogdan Pasca 001; Martin Langhammer (ARITH, 2023)

Multiplier Architecture with a Carry-Based Partial Product Encoding. - Martin Langhammer; Bogdan Pasca 001; Igor Kucherenko (ARITH, 2024)

if-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs. - Shahzad Ahmad Butt; Benjamin Reynolds; Veeraraghavan Ramamurthy; Xiao Xiao; Pohrong Chu; Setareh Sharifian; Sergey Gribok; Bogdan Pasca 001 (FCCM, 2024)

Efficient 8-bit Matrix Multiplication on Intel Agilex-5 FPGAs. - Sergey Gribok; Bogdan Pasca 001 (FCCM, 2024)

FPGA Modular Multipliers using Hybrid Reduction Techniques. - Sergey Gribok; Martin Langhammer; Bogdan Pasca 001 (FPL, 2024)

CSAIL2019 Crypto-Puzzle Solver Architecture. - Sergey Gribok; Bogdan Pasca 001; Martin Langhammer (ACM Trans. Reconfigurable Technol. Syst., 2024)