Emulating an MIMD architecture. - Bogong Su; Ralph Grishman (MICRO, 1982)

A Preliminary Evaluatin of Trace Scheduling for Global Microcode Compaction. - Ralph Grishman; Bogong Su (IEEE Trans. Computers, 1983)

An improvement of trace scheduling for global microcode compaction. - Bogong Su; Shiyuan Ding; Lan Jin (MICRO, 1984)

Some experiments in global microcode compaction. - Bogong Su; Shiyuan Ding (MICRO, 1985)

A case study in signal processing microprogramming using the URPR software pipelining technique. - Robert A. Mueller; Bogong Su; Michael R. Duda; Brian L. Plomondon (MICRO, 1986)

URPR - An extension of URCR for software pipelining. - Bogong Su; Shiyuan Ding; Jinshi Xia (MICRO, 1986)

Microcode compaction with timing constraints. - Bogong Su; Shiyuan Ding; Jian Wang 046; Jinshi Xia (MICRO, 1987)

GURPR - a method for global software pipelining. - Bogong Su; Shiyuan Ding; Jian Wang 046; Jinshi Xia (MICRO, 1987)

The Architecture of a Distributed Knowledge Base System. - Bogong Su; Chunyi Shi; Kehong Wang; Peng Hu; Hao Shi; Jian Wang 046 (DS-3, 1988)

Global microcode compaction under timing constraints. - Bogong Su; Jian Wang 046; Jinshi Xia (MICRO, 1988)

Distributed Problem Solving System for Transport Dispatching. - Bogong Su; Chunyi Shi; Kehong Wang; Peng Hu; Jiang Wang; Yiming Wu (IEA/AIE (Vol. 1), 1990)

A software pipelining based VLIW architecture and optimizing compiler. - Bogong Su; Jian Wang 046; Zhizhong Tang; Wei Zhao; Yimin Wu (MICRO, 1990)

Decomposition and allocation of flat-structured problems. - Peng Hu; Bogong Su; Chunyi Shi (COMPSAC, 1991)

GURPR*: A New Global Software Pipelining Algorithm. - Bogong Su; Jian Wang 046 (MICRO, 1991)

A VLIW architecture for optimal execution of branch-intensive loops. - Bogong Su; Wei Zhao; Zhizhong Tang; Stanley Habib (MICRO, 1992)

Foresighted Instruction Scheduling Under Timing Constraints. - Vicki H. Allan; Bogong Su; Pantung Wijaya; Jian Wang 046 (IEEE Trans. Computers, 1992)

GPMB - software pipelining branch-intensive loops. - Zhizhong Tang; Gang Chen; Chihong Zhang; Yingwei Zhang; Bogong Su; Stanley Habib (MICRO, 1993)

URPR-1: A single-chip VLIW architecture. - Bogong Su; Jian Wang 046; Zhizhong Tang; Chihong Zhang; Wei Zhao (Microprocess. Microprogramming, 1993)

A study of pointer aliasing for software pipelining using run-time disambiguation. - Bogong Su; Stanley Habib; Wei Zhao; Jian Wang 046; Youfeng Wu (MICRO, 1994)

Decomposed software pipelining: A new perspective and a new approach. - Jian Wang 046; Christine Eisenbeis; Martin Jourdan; Bogong Su (Int. J. Parallel Program., 1994)

Using timed Petri net to model instruction-level loop scheduling with resource constraints. - Jian Wang 046; Christine Eisenbeis; Bogong Su (J. Comput. Sci. Technol., 1994)

Software pipelining of nested loops for real-time DSP applications. - Jian Wang 046; Bogong Su (ICASSP, 1998)

Building a Retargetable Local Instruction Scheduler. - Vicki H. Allan; Steven J. Beaty; Bogong Su; Philip H. Sweany (Softw. Pract. Exp., 1998)

Source-level loop optimization for DSP code generation. - Bogong Su; Jian Wang 046; Andrew Esguerra (ICASSP, 1999)

A scalable loop optimization approach for scalable DSP processors. - Jian Wang 046; Bogong Su; Erh-Wen Hu (ICASSP, 2000)

De-pipeline a software-pipelined loop. - Bogong Su; Jian Wang 046; Erh-Wen Hu; Joseph B. Manzano (ICASSP (2), 2003)

Loop optimization with tradeoff between cycle count and code size for DSP applications. - Bogong Su; Jian Wang 046; Rafi Rabipour; Erh-Wen Hu; Joseph B. Manzano (EUSIPCO, 2004)

Software De-Pipelining Technique. - Bogong Su; Jian Wang 046; Erh-Wen Hu; Joseph B. Manzano (SCAM, 2004)

New DSP Benchmark based on Selectable Mode Vocoder (SMV). - Erh-Wen Hu; Cyril Ku; Andrew Russo; Bogong Su; Jian Wang 046 (CDES, 2006)

Software performance prediction at source level. - Erh-Wen Hu; Bogong Su; Jian Wang 046 (SERA, 2017)

Comparing DSP Software Performance Prediction Models at Source Code Level - From Analytical to Statistical. - Erh-Wen Hu; Weihua Liu; Bogong Su; Jian Wang 046 (J. Softw., 2019)

A Study of Machine Learning Inference Benchmarks. - Oliver Alvarado Rodriguez; Dev Dave; Weihua Liu; Bogong Su (ICAIP, 2020)

Using machine learning techniques for DSP software performance prediction at source code level. - Weihua Liu; Erh-Wen Hu; Bogong Su; Jian Wang 046 (Connect. Sci., 2021)