Model Checking Rectangular Hybrid Systems with Timed Computation Tree Logic. - Haibin Zhang; Zhenhua Duan; Bohu Huang; Xiaobing Wang; Long Zhang (TASE, 2010)

ESHMP: A Stall-Time-Based Scheduling for Performance Heterogeneous Multicore Systems. - Pengcheng Nie; Zhenhua Duan; Bohu Huang (HPCC, 2011)

A Self-ORganizing Trust Model Based on HP2P. - Zhenhua Duan; Yujiang Hui; Cong Tian; Nan Zhang 001; Bohu Huang (MSN, 2015)

A Runtime Optimization Approach for FPGA Routing. - Dekui Wang; Zhenhua Duan; Cong Tian; Bohu Huang; Nan Zhang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Detecting air-gapped attacks using machine learning. - Weijun Zhu; Joel J. P. C. Rodrigues; Jianwei Niu 002; Qinglei Zhou; Yafei Li; Mingliang Xu 001; Bohu Huang (Cogn. Syst. Res., 2019)

ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach. - Dekui Wang; Zhenhua Duan; Cong Tian; Bohu Huang; Nan Zhang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Jump-teaching: Ultra Efficient and Robust Learning with Noisy Label. - Kangye Ji; Fei Cheng; Zeqing Wang; Bohu Huang (CoRR, 2024)

Efficient Continual Learning with Low Memory Footprint For Edge Device. - Zeqing Wang; Fei Cheng; Kangye Ji; Bohu Huang (CoRR, 2024)

LightCL: Compact Continual Learning with Low Memory Footprint For Edge Device. - Zeqing Wang; Fei Cheng; Kangye Ji; Bohu Huang (ASP-DAC, 2025)