Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning. - Bomin Joo; Jin-Woo Han; Bai-Sun Kong (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Low-Power High-Speed Sense-Amplifier-Based Flip-Flops With Conditional Bridging. - Bomin Joo; Bai-Sun Kong (IEEE Access, 2023)

CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop. - Geonhwi Lee; Bomin Joo; Bai-Sun Kong (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Bio-Inspired Energy- and Area-Efficient Sound Localization Neural Network. - Bomin Joo; Minkyu Ko; Jieun Kim; Bai-Sun Kong (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Low-Power Fully-Static Contention-Free Flip-Flop With Reduced Clock Load. - Minkyu Ko; Bomin Joo; Bai-Sun Kong (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

Biomimetic Spiking Neural Network Based on Monolayer 2-D Synapse With Short-Term Plasticity for Auditory Brainstem Processing. - Jieun Kim; Peng Zhou 017; Unbok Wi; Bomin Joo; Donguk Choi; Myeong-Lok Seol; Sravya Pulavarthi; Linfeng Sun; Heejun Yang; Woo Jong Yu; Jin-Woo Han; Sung Mo Kang 001; et al. (IEEE Trans. Cogn. Dev. Syst., 2025)

A Single-Phase Contention- and Redundant Transition-Free Flip-Flop With Improved DQ Latency. - Bomin Joo; Minkyu Ko; Geonhwi Lee; Bai-Sun Kong (IEEE J. Solid State Circuits, 2025)