Fault Modeling and Testability of CMOS Domino Circuits. - Waleed K. Al-Assadi; Pavankumar Chandrasekhar; Bonita Bhaskaran (CDES, 2005)

Implementation of Design For Test for Asynchronous NCL Designs. - Bonita Bhaskaran; Venkat Satagopan; Waleed K. Al-Assadi; Scott C. Smith (CDES, 2005)

High-Speed Energy Estimation for Delay-Insensitive Circuits. - Bonita Bhaskaran; Venkat Satagopan; Scott C. Smith (CDES, 2005)

Automated energy calculation and estimation for delay-insensitive digital circuits. - Venkat Satagopan; Bonita Bhaskaran; Anshul Singh; Scott C. Smith (Microelectron. J., 2007)

DFT Techniques and Automation for Asynchronous NULL Conventional Logic Circuits. - Venkat Satagopan; Bonita Bhaskaran; Waleed K. Al-Assadi; Scott C. Smith; Sindhu Kakarla (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Advanced test methodology for complex SoCs. - Pavan Kumar Datla Jagannadha; Mahmut Yilmaz; Milind Sonawane; Sailendra Chadalavada; Shantanu Sarangi; Bonita Bhaskaran; Ayub Abdollahian (ITC, 2016)

Test method and scheme for low-power validation in modern SOC integrated circuits. - Bonita Bhaskaran; Amit Sanghani; Kaushik Narayanun; Ayub Abdollahian; Amit Laknaur (VTS, 2016)

A programmable method for low-power scan shift in SoC integrated circuits. - Ran Wang 002; Bonita Bhaskaran; Karthikeyan Natarajan; Ayub Abdollahian; Kaushik Narayanun; Krishnendu Chakrabarty; Amit Sanghani (VTS, 2016)

At-speed capture global noise reduction & low-power memory test architecture. - Bonita Bhaskaran; Sailendra Chadalavada; Shantanu Sarangi; Nithin Valentine; Venkat Abilash Reddy Nerallapally; Ayub Abdollahian (VTS, 2017)

An Efficient Supervised Learning Method to Predict Power Supply Noise During At-speed Test. - Seyed Nima Mozaffari; Bonita Bhaskaran; Kaushik Narayanun; Ayub Abdollahian; Vinod Pagalone; Shantanu Sarangi; Jonathon E. Colburn (ITC, 2019)

Special Session: In-System-Test (IST) Architecture for NVIDIA Drive-AGX Platforms. - Pavan Kumar Datla Jagannadha; Mahmut Yilmaz; Milind Sonawane; Sailendra Chadalavada; Shantanu Sarangi; Bonita Bhaskaran; Shashank Bajpai; Venkat Abilash Reddy Nerallapally; Jayesh Pandey; Sam Jiang (VTS, 2019)

A Novel Graph-Coloring-Based Solution for Low-Power Scan Shift. - Saurabh Gupta 005; Bonita Bhaskaran; Shantanu Sarangi; Ayub Abdollahian; Jennifer Dworak (IEEE Des. Test, 2020)

Observation Point Insertion Using Deep Learning. - Bonita Bhaskaran; Sanmitra Banerjee; Kaushik Narayanun; Shao-Chun Hung; Seyed Nima Mozaffari Mojaveri; Mengyun Liu; Gang Chen; Tung-Che Liang (ICCAD, 2022)

On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST). - Seyed Nima Mozaffari; Bonita Bhaskaran; Shantanu Sarangi; Suhas M. Satheesh; Kuo Lin Fu; Nithin Valentine; P. Manikandan; Mahmut Yilmaz (VTS, 2022)

ChipNeMo: Domain-Adapted LLMs for Chip Design. - Mingjie Liu; Teodor-Dumitru Ene; Robert Kirby 001; Chris Cheng; Nathaniel Ross Pinckney; Rongjian Liang; Jonah Alben; Himyanshu Anand; Sanmitra Banerjee; Ismet Bayraktaroglu; Bonita Bhaskaran; Bryan Catanzaro; et al. (CoRR, 2023)

Revisiting Microelectronics Resilience and Reliability in the Era of AI. - Arjun Chaudhuri; Bonita Bhaskaran (VTS, 2025)