Lakshmi Boppana

According to our database, Lakshmi Boppana authored at least 34 papers between 2008 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

Low area-time complexity point multiplication architecture for ECC over GF(2^rmm) using polynomial basis.

Pradeep Kumar Goud Nadikuda, Lakshmi Boppana

J. Cryptogr. Eng., April, 2023

Automated Plagiarism Detection in Moodle.

Ravi Kishore Kodali, Tanvi Shekhar, Lakshmi Boppana

Proceedings of the IEEE Region 10 Conference, 2023

Attendance System using Amazon Rekognition.

Ravi Kishore Kodali, Aniket Panda, Lakshmi Boppana

Proceedings of the IEEE Region 10 Conference, 2023

IoT based Wearable Glasses for Visually Impaired Users.

Lakshmi Boppana, Keerthi Kiran A., Pranay Teja B., Laxmi Priya P.

Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2023

2022

An area-time efficient point-multiplication architecture for ECC over GF(2^m) using polynomial basis.

Pradeep Kumar Goud Nadikuda, Lakshmi Boppana

Microprocess. Microsystems, June, 2022

An area-efficient architecture for finite field inversion over GF(2^m) using polynomial basis.

Pradeep Kumar Goud Nadikuda, Lakshmi Boppana

Microprocess. Microsystems, March, 2022

2021

Low-latency area-efficient systolic bit-parallel <i>GF</i>(2m) multiplier for a narrow class of trinomials.

Siva Ramakrishna Pillutla, Lakshmi Boppana

Microelectron. J., 2021

Low-complexity bit-serial sequential polynomial basis finite field GF(2m) Montgomery multipliers.

Siva Ramakrishna Pillutla, Lakshmi Boppana

Microprocess. Microsystems, 2021

2020

Area-efficient low-latency polynomial basis finite field GF(2^<i>m</i>) systolic multiplier for a class of trinomials.

Siva Ramakrishna Pillutla, Lakshmi Boppana

Microelectron. J., 2020

High-throughput area-delay-efficient systolic multiplier over GF(2^<i>m</i>) for a class of trinomials.

Siva Ramakrishna Pillutla, Lakshmi Boppana

Microprocess. Microsystems, 2020

Smart Wake-up Stroke Alert System.

Lakshmi Boppana, Bharat Kumar Kuppuru, Krishna Karthik Nerella, Sharmila Kovvada

Proceedings of the 2020 IEEE Region 10 Conference, 2020

Deep Learning Approach for Dermototis Identification.

Lakshmi Boppana, Minai Kulkarni, Divya Katrevula, Harshitha Daruri

Proceedings of the 2020 IEEE Region 10 Conference, 2020

2019

A high-throughput fully digit-serial polynomial basis finite field GF(2^m) multiplier for IoT applications.

Siva Ramakrishna Pillutla, Lakshmi Boppana

Proceedings of the TENCON 2019, 2019

IoT based security system.

Ravi Kishore Kodali, Sasweth C. Rajanarayanan, Anvesh Koganti, Lakshmi Boppana

Proceedings of the TENCON 2019, 2019

RFID based Vehicle Emission Monitoring and Notification System.

Lakshmi Boppana, Shivangni Rani, Ravi Kishore Kodali

Proceedings of the TENCON 2019, 2019

Mongoose OS based Air Quality Monitoring System.

Lakshmi Boppana, K. Lalasa, S. Vandana, Ravi Kishore Kodali

Proceedings of the TENCON 2019, 2019

Smart Cap for Alzheimer Patients using Deep Learning.

Lakshmi Boppana, Pragya Kumari, Rohan Chidrewar, Pavan Krishna Gadde

Proceedings of the TENCON 2019, 2019

Smart Stick for Elderly.

Lakshmi Boppana, Vishal Jain, Ravi Kishore Kodali

Proceedings of the 2019 International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, 2019

Assistive Sign Language Converter for Deaf and Dumb.

Lakshmi Boppana, Rasheed Ahamed, Harshali Rane, Ravi Kishore Kodali

Proceedings of the 2019 International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, 2019

2018

Design and Implementation of a Novel Bit-Parallel Systolic Multiplier Over GF(2^<i>m</i>) for Irreducible Pentanomials.

Sudha Ellison Mathe, Lakshmi Boppana

J. Circuits Syst. Comput., 2018

Bit-parallel systolic multiplier over GF ( 2 m ) for irreducible trinomials with ASIC and FPGA implementations.

Sudha Ellison Mathe, Lakshmi Boppana

IET Circuits Devices Syst., 2018

2017

Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m).

Sudha Ellison Mathe, Lakshmi Boppana

KSII Trans. Internet Inf. Syst., 2017

2016

Experimental validation of orthogonal frequency division multiplexing with peak-to-average power ratio reduction and out-band distortion control using software defined radio.

Bathula Siva Kumar Reddy, Boppana Lakshmi

IET Signal Process., 2016

2015

Improvement in the Performance of WiMAX with Channel Equalizers and Space Time Block Coding Techniques Using Simulink.

B. Siva Kumar Reddy, Boppana Lakshmi

Wirel. Pers. Commun., 2015

Minimizing PAPR and Synchronization Errors in OFDM for WiMAX Using Software Defined Radio.

B. Siva Kumar Reddy, Boppana Lakshmi

J. Circuits Syst. Comput., 2015

Packet data transmission in worldwide interoperability for microwave access with reduced peak to average power ratio and out-band distortion using software defined radio.

B. Siva Kumar Reddy, Boppana Lakshmi

IET Commun., 2015

FPGA implementation of multiplication algorithms for ECC.

Ravi Kishore Kodali, Lakshmi Boppana, A. V. Saikiran, Chandana N. Amanchi

Proceedings of the 2015 International Conference on Advances in Computing, 2015

Energy efficient m- level LEACH protocol.

Ravi Kishore Kodali, Venkata Sai Kiran A., Shikha Bhandari, Lakshmi Boppana

Proceedings of the 2015 International Conference on Advances in Computing, 2015

2014

Irrigation with grid architecture sensor network.

Ravi Kishore Kodali, Lakshmi Boppana

Proceedings of the 2014 International Conference on Advances in Computing, 2014

FPGA implementation of energy efficient multiplication over GF(2^m) for ECC.

Ravi Kishore Kodali, Lakshmi Boppana

Proceedings of the 2014 International Conference on Advances in Computing, 2014

2013

VLSI architecture for parallel radix-4 CORDIC.

Boppana Lakshmi, A. S. Dhar

Microprocess. Microsystems, 2013

2011

VLSI architecture for low latency radix-4 CORDIC.

Boppana Lakshmi, A. S. Dhar

Comput. Electr. Eng., 2011

2010

CORDIC Architectures: A Survey.

Boppana Lakshmi, A. S. Dhar

VLSI Design, 2010

2008

Low Latency VLSI Architecture for the Radix-4 CORDIC Algorithm.

Boppana Lakshmi, A. S. Dhar

Proceedings of the IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, 2008