Robust architectural support for transactional memory in the power architecture. - Harold W. Cain; Maged M. Michael; Brad Frey; Cathy May; Derek Williams; Hung Q. Le (ISCA, 2013)

Transactional memory support in the IBM POWER8 processor. - Hung Q. Le; Guy L. Guthrie; Derek Williams; Maged M. Michael; Brad Frey; William J. Starke; Cathy May; Rei Odaira; Takuya Nakaike (IBM J. Res. Dev., 2015)

Confidential computing for OpenPOWER. - Guerney D. H. Hunt; Ramachandra Pai; Michael V. Le; Hani Jamjoom; Sukadev Bhattiprolu; Rick Boivie; Laurent Dufour; Brad Frey; Mohit Kapur; Kenneth A. Goldman; Ryan Grimm; Janani Janakirman; et al. (EuroSys, 2021)

A matrix math facility for Power ISA(TM) processors. - José E. Moreira; Kit Barton; Steven Battle; Peter Bergner; Ramon Bertran; Puneeth Bhat; Pedro Caldeira; David Edelsohn; Gordon C. Fossum; Brad Frey; Nemanja Ivanovic; Chip Kerchner; et al. (CoRR, 2021)