VLSI design and implementation of a real-time image segmentation processor. - Bir Bhanu; Brad L. Hutchings; Kent F. Smith (Mach. Vis. Appl., 1989)

High-Speed Circuit Design: CAD Tools and Computational Challenges. - Brad L. Hutchings; Tony M. Carter (HICSS (1), 1994)

Multiple-Layer Cross-Field Ultrasonic Tactile Sensor. - Brad L. Hutchings; A. R. Grahn; Russell J. Petersen (ICRA, 1994)

Design methodologies for partially reconfigured systems. - James D. Hadley; Brad L. Hutchings (FCCM, 1995)

A dynamic instruction set computer. - Michael J. Wirthlin; Brad L. Hutchings (FCCM, 1995)

Implementation Approaches for Reconfigurable Logic Applications. - Brad L. Hutchings; Michael J. Wirthlin (FPL, 1995)

An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing. - Russell J. Petersen; Brad L. Hutchings (FPL, 1995)

Mixing fixed and reconfigurable logic for array processing. - Pieter J. Bakkes; Jan J. Du Plessis; Brad L. Hutchings (FCCM, 1996)

Supporting FPGA microprocessors through retargetable software tools. - David A. Clark; Brad L. Hutchings (FCCM, 1996)

Sequencing Run-Time Reconfigured Hardware with Software. - Michael J. Wirthlin; Brad L. Hutchings (FPGA, 1996)

Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. - James G. Eldredge; Brad L. Hutchings (J. VLSI Signal Process., 1996)

Automated target recognition on SPLASH 2. - Michael Rencher; Brad L. Hutchings (FCCM, 1997)

Improving Functional Density Through Run-Time Constant Propagation. - Michael J. Wirthlin; Brad L. Hutchings (FPGA, 1997)

Exploiting reconfigurability through domain-specific systems. - Brad L. Hutchings (FPL, 1997)

ASICs, Processors, and Configurable Computing. - Brad L. Hutchings (HICSS (1), 1997)

JHDL - An HDL for Reconfigurable Systems. - Peter Bellows; Brad L. Hutchings (FCCM, 1998)

The flexibility of configurable computing. - John D. Villasenor; Brad L. Hutchings (IEEE Signal Process. Mag., 1998)

Improving functional density using run-time circuit reconfiguration [FPGAs]. - Michael J. Wirthlin; Brad L. Hutchings (IEEE Trans. Very Large Scale Integr. Syst., 1998)

A CAD Suite for High-Performance FPGA Design. - Brad L. Hutchings; Peter Bellows; Joseph Hawkins; K. Scott Hemmert; Brent E. Nelson; Mike Rytting (FCCM, 1999)

A Reconfigurable Arithmetic Array for Multimedia Application. - Alan Marshall; Tony Stansfield; Igor Kostarnov; Jean Vuillemin; Brad L. Hutchings (FPGA, 1999)

Using general-purpose programming languages for FPGA design. - Brad L. Hutchings; Brent E. Nelson (DAC, 2000)

Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. - Paul S. Graham; Brad L. Hutchings; Brent E. Nelson (FCCM, 2000)

Designing and Debugging Custom Computing Applications. - Brad L. Hutchings; Brent E. Nelson; Michael J. Wirthlin (IEEE Des. Test Comput., 2000)

Instrumenting Bitstreams for Debugging FPGA Circuits. - Paul S. Graham; Brent E. Nelson; Brad L. Hutchings (FCCM, 2001)

An Application-Specific Compiler for High-Speed Binary Image Morphology. - K. Scott Hemmert; Brad L. Hutchings; Anshul Malvi (FCCM, 2001)

Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. - Timothy Wheeler; Paul S. Graham; Brent E. Nelson; Brad L. Hutchings (FPL, 2001)

Synthesizing RTL Hardware from Java Byte Codes. - Michael J. Wirthlin; Brad L. Hutchings; Carl D. Worth (FPL, 2001)

Unifying simulation and execution in a design environment for FPGA systems. - Brad L. Hutchings; Brent E. Nelson (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Designing Run-Time Reconfigurable Systems with JHDL. - Peter Bellows; Brad L. Hutchings (J. VLSI Signal Process., 2001)

Assisting Network Intrusion Detection with Reconfigurable Hardware. - Brad L. Hutchings; R. Franklin; D. Carver (FCCM, 2002)

Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. - Wesley J. Landaker; Michael J. Wirthlin; Brad L. Hutchings (FPL, 2002)

Sea Cucumber: A Synthesizing Compiler for FPGAs. - Justin L. Tripp; Preston A. Jackson; Brad L. Hutchings (FPL, 2002)

Algorithms for Coloring Quadtrees. - David Eppstein; Marshall W. Bern; Brad L. Hutchings (Algorithmica, 2002)

Issues in debugging highly parallel FPGA-based applications derived from source code. - K. Scott Hemmert; Brad L. Hutchings (ASP-DAC, 2003)

Adaptive computing: what can it do, where can it go? - Robert Reuss; Jose L. Muñoz; Toshiaki Miyazaki; Nader Bagherzadeh; Prith Banerjee; Brad L. Hutchings; Brian Schott (ASP-DAC, 2003)

Source Level Debugger for the Sea Cucumber Synthesizing Compiler. - K. Scott Hemmert; Justin L. Tripp; Brad L. Hutchings; Preston A. Jackson (FCCM, 2003)

Simulation and Synthesis of CSP-based Interprocess Communication. - Preston A. Jackson; Brad L. Hutchings; Justin L. Tripp (FCCM, 2003)

Reconfigurable Computing Application Frameworks. - Anthony L. Slade; Brent E. Nelson; Brad L. Hutchings (FCCM, 2003)

What is the right model for programming and using modern FPGAs? - André DeHon; Brad L. Hutchings; Daryl Rudusky; James Hwang; Nikhil; Salil Raje; Adrian Stoica (FPGA, 2004)

GigaOp DSP on FPGA. - Brad L. Hutchings; Brent E. Nelson (J. VLSI Signal Process., 2004)

Design Productivity for Configurable Computing. - Brent E. Nelson; Michael J. Wirthlin; Brad L. Hutchings; Peter M. Athanas; Shawn A. Bohner (ERSA, 2008)

Design, Debug, Deploy: The Creation of Configurable Computing Applications. - Brent E. Nelson; Brad L. Hutchings; Michael J. Wirthlin (J. Signal Process. Syst., 2008)

Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). - Brad L. Hutchings; Brent E. Nelson; Stephen West; Reed Curtis (FCCM, 2009)

Comparing fine-grained performance on the Ambric MPPA against an FPGA. - Brad L. Hutchings; Brent E. Nelson; Stephen West; Reed Curtis (FPL, 2009)

Using Hard Macros to Reduce FPGA Compilation Time. - Christopher Lavin; Marc Padilla; Subhrashankha Ghosh; Brent E. Nelson; Brad L. Hutchings; Michael J. Wirthlin (FPL, 2010)

Rapid prototyping tools for FPGA designs: RapidSmith. - Christopher Lavin; Marc Padilla; Philip Lundrigan; Brent E. Nelson; Brad L. Hutchings (FPT, 2010)

Fault Injection Results of Linux Operating on an FPGA Embedded Platform. - Joshua S. Monson; Michael J. Wirthlin; Brad L. Hutchings (ReConFig, 2010)

HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping. - Christopher Lavin; Marc Padilla; Jaren Lamprecht; Philip Lundrigan; Brent E. Nelson; Brad L. Hutchings (FCCM, 2011)

FPGA Communication Framework. - Peter Lieber; Brad L. Hutchings (FCCM, 2011)

RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs. - Christopher Lavin; Marc Padilla; Jaren Lamprecht; Philip Lundrigan; Brent E. Nelson; Brad L. Hutchings (FPL, 2011)

Profiling FPGA floor-planning effects on timing closure. - Jaren Lamprecht; Brad L. Hutchings (FPL, 2012)

A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform. - Joshua S. Monson; Michael J. Wirthlin; Brad L. Hutchings (Int. J. Reconfigurable Comput., 2012)

The NII Shonan Configurable Computing Workshop (NII Shonan Meeting 2012-11). - Peter M. Athanas; Brad L. Hutchings; Kentaro Sano (NII Shonan Meet. Rep., 2012)

Implementing high-performance, low-power FPGA-based optical flow accelerators in C. - Joshua S. Monson; Michael J. Wirthlin; Brad L. Hutchings (ASAP, 2013)

Impact of hard macro size on FPGA clock rate and place/route time. - Christopher Lavin; Brent E. Nelson; Brad L. Hutchings (FPL, 2013)

Improving clock-rate of hard-macro designs. - Christopher Lavin; Brent E. Nelson; Brad L. Hutchings (FPT, 2013)

Optimization techniques for a high level synthesis implementation of the Sobel filter. - Joshua S. Monson; Michael J. Wirthlin; Brad L. Hutchings (ReConFig, 2013)

Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs. - Brad L. Hutchings; Jared Keeley (FCCM, 2014)

A power side-channel-based digital to analog converterfor Xilinx FPGAs. - Brad L. Hutchings; Joshua S. Monson; Danny Savory; Jared Keeley (FPGA, 2014)

New approaches for in-system debug of behaviorally-synthesized FPGA circuits. - Joshua S. Monson; Brad L. Hutchings (FPL, 2014)

RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs. - Travis Haroldsen; Brent E. Nelson; Brad L. Hutchings (FPGA, 2015)

Using Source-Level Transformations to Improve High-Level Synthesis Debug and Validation on FPGAs. - Joshua S. Monson; Brad L. Hutchings (FPGA, 2015)

Using source-to-source compilation to instrument circuits for debug with High Level Synthesis. - Joshua S. Monson; Brad L. Hutchings (FPT, 2015)

Using shadow pointers to trace C pointer values in FPGA circuits. - Joshua S. Monson; Brad L. Hutchings (ReConFig, 2015)

Packing a modern Xilinx FPGA using RapidSmith. - Travis Haroldsen; Brent E. Nelson; Brad L. Hutchings (ReConFig, 2016)

Rapid implementation of a partially reconfigurable video system with PYNQ. - Brad L. Hutchings; Michael J. Wirthlin (FPL, 2017)

Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. - Jeffrey Goeders; Tanner Gaskin; Brad L. Hutchings (FCCM, 2018)

Enabling Low Impact, Rapid Debug for Highly Utilized FPGA Designs. - Robert Hale; Brad L. Hutchings (FPL, 2018)

Distributed-Memory Based FPGA Debug: Design Timing Impact. - Robert Hale; Brad L. Hutchings (FPT, 2018)

Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs. - Adam Hastings; Sean Jensen; Jeffrey Goeders; Brad L. Hutchings (IVSW, 2018)

Enhancing debug observability for HLS-based FPGA circuits through source-to-source compilation. - Joshua S. Monson; Brad L. Hutchings (J. Parallel Distributed Comput., 2018)

Preallocating Resources for Distributed Memory Based FPGA Debug. - Robert Hale; Brad L. Hutchings (FPL, 2019)

Using Novel Configuration Techniques for Accelerated FPGA Aging. - Tanner Gaskin; Hayden Cook; Wesley Stirk; Robert Lucas; Jeffrey Goeders; Brad L. Hutchings (FPL, 2020)

Cloning the Unclonable: Physically Cloning an FPGA Ring-Oscillator PUF. - Hayden Cook; Jonathan Thompson; Zephram Tripp; Brad L. Hutchings; Jeffrey Goeders (FPT, 2022)

Approaches for FPGA Design Assurance. - Eli Cahill; Brad L. Hutchings; Jeffrey Goeders (ACM Trans. Reconfigurable Technol. Syst., 2022)

Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits. - Hayden Cook; Jacob Arscott; Brent George; Tanner Gaskin; Jeffrey Goeders; Brad L. Hutchings (ACM Trans. Reconfigurable Technol. Syst., 2022)

Improving the Reliability of FPGA CRO PUFs. - Hayden Cook; Zephram Tripp; Brad L. Hutchings; Jeffrey Goeders (FPL, 2023)