Post-Silicon Debug Using Programmable Logic Cores. - Bradley R. Quinton; Steven J. E. Wilton (FPT, 2005)

Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow. - Bradley R. Quinton; Mark R. Greenstreet; Steven J. E. Wilton (ICCD, 2005)

Concentrator access networks for programmable logic cores on SoCs. - Bradley R. Quinton; Steven J. E. Wilton (ISCAS (1), 2005)

A synthesizable datapath-oriented embedded FPGA fabric. - Steven J. E. Wilton; Chun Hok Ho; Philip Heng Wai Leong; Wayne Luk; Bradley R. Quinton (FPGA, 2007)

Embedded Programmable Logic Core Enhancements for System Bus Interfaces. - Bradley R. Quinton; Steven J. E. Wilton (FPL, 2007)

A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications. - Steven J. E. Wilton; Chun Hok Ho; Bradley R. Quinton; Philip Heng Wai Leong; Wayne Luk (ACM Trans. Reconfigurable Technol. Syst., 2008)

Practical Asynchronous Interconnect Network Design. - Bradley R. Quinton; Mark R. Greenstreet; Steven J. E. Wilton (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Programmable Logic Core Enhancements for High-Speed On-Chip Interfaces. - Bradley R. Quinton; Steven J. E. Wilton (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Rapid RTL-based signal ranking for FPGA prototyping. - Steven J. E. Wilton; Bradley R. Quinton; Eddie Hung (FPT, 2012)

Linking the Verification and Validation of Complex Integrated Circuits Through Shared Coverage Metrics. - Eddie Hung; Bradley R. Quinton; Steven J. E. Wilton (IEEE Des. Test, 2013)

Dynamic Object Comprehension: A Framework For Evaluating Artificial Visual Perception. - Scott Y. L. Chin; Bradley R. Quinton (CoRR, 2022)