Bit serial systolic chip set for real-time image coding. - P. A. Ramamoorthy; Brahmaji Potu (ICASSP, 1987)

DSP system architecture using signed-digit number representation. - P. A. Ramamoorthy; Brahmaji Potu; Girish Govind (ICASSP, 1988)

A fully digital architecture for multi-state neural networks. - Brahmaji Potu; P. A. Ramamoorthy (Neural Networks, 1988)

High-speed ADC using residue number system. - P. A. Ramamoorthy; Brahmaji Potu (ICASSP, 1989)