OPTIMUS: A Security-Centric Dynamic Hardware Partitioning Scheme for Processors that Prevent Microarchitecture State Attacks. - Hamza Omar; Brandon D'Agostino; Omer Khan (IEEE Trans. Computers, 2020)

Seeds of SEED: Characterizing Enclave-level Parallelism in Secure Multicore Processors. - Brandon D'Agostino; Omer Khan (SEED, 2021)

Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration. - Kathleen Feng; Alex Carsello; Taeyoung Kong; Kalhan Koul; Qiaoyi Liu; Jackson Melchert; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (HCS, 2022)

Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. - Alex Carsello; Kathleen Feng; Taeyoung Kong; Kalhan Koul; Qiaoyi Liu; Jackson Melchert; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (VLSI Technology and Circuits, 2022)

Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. - Kathleen Feng; Taeyoung Kong; Kalhan Koul; Jackson Melchert; Alex Carsello; Qiaoyi Liu; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (IEEE J. Solid State Circuits, 2024)