Optimal Type Lifting. - Bratin Saha; Zhong Shao 001 (Types in Compilation, 1998)

Fully reflexive intensional type analysis. - Valery Trifonov; Bratin Saha; Zhong Shao 001 (ICFP, 2000)

Principled Scavenging. - Stefan Monnier; Bratin Saha; Zhong Shao 001 (PLDI, 2001)

Intensional analysis of quantified types. - Bratin Saha; Valery Trifonov; Zhong Shao 001 (ACM Trans. Program. Lang. Syst., 2003)

A type system for certified binaries. - Zhong Shao 001; Valery Trifonov; Bratin Saha; Nikolaos Papaspyrou (ACM Trans. Program. Lang. Syst., 2005)

Software transactional memory. - Bratin Saha (Hot Chips Symposium, 2006)

McRT-Malloc: a scalable transactional memory allocator. - Richard L. Hudson; Bratin Saha; Ali-Reza Adl-Tabatabai; Ben Hertzberg (ISMM, 2006)

Architectural Support for Software Transactional Memory. - Bratin Saha; Ali-Reza Adl-Tabatabai; Quinn Jacobson (MICRO, 2006)

Compiler and runtime support for efficient software transactional memory. - Ali-Reza Adl-Tabatabai; Brian T. Lewis; Vijay Menon 002; Brian R. Murphy; Bratin Saha; Tatiana Shpeisman (PLDI, 2006)

McRT-STM: a high performance software transactional memory system for a multi-core runtime. - Bratin Saha; Ali-Reza Adl-Tabatabai; Richard L. Hudson; Chi Cao Minh; Ben Hertzberg (PPoPP, 2006)

Unlocking concurrency. - Ali-Reza Adl-Tabatabai; Christos Kozyrakis; Bratin Saha (ACM Queue, 2006)

Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. - Cheng Wang 013; Wei-Yu Chen; Youfeng Wu; Bratin Saha; Ali-Reza Adl-Tabatabai (CGO, 2007)

Enabling scalability and performance in a large scale CMP environment. - Bratin Saha; Ali-Reza Adl-Tabatabai; Anwar M. Ghuloum; Mohan Rajagopalan; Richard L. Hudson; Leaf Petersen; Vijay Menon 002; Brian R. Murphy; Tatiana Shpeisman; Eric Sprangle; Anwar Rohillah; Doug Carmean; et al. (EuroSys, 2007)

Enforcing isolation and ordering in STM. - Tatiana Shpeisman; Vijay Menon 002; Ali-Reza Adl-Tabatabai; Steven Balensiefer; Dan Grossman; Richard L. Hudson; Katherine F. Moore; Bratin Saha (PLDI, 2007)

Transactional programming in a multi-core environment. - Ali-Reza Adl-Tabatabai; Christos Kozyrakis; Bratin Saha (PPoPP, 2007)

Open nesting in software transactional memory. - Yang Ni; Vijay Menon 002; Ali-Reza Adl-Tabatabai; Antony L. Hosking; Richard L. Hudson; J. Eliot B. Moss; Bratin Saha; Tatiana Shpeisman (PPoPP, 2007)

Design and implementation of transactional constructs for C/C++. - Yang Ni; Adam Welc; Ali-Reza Adl-Tabatabai; Moshe Bach; Sion Berkowits; James Cownie; Robert Geva; Sergey Kozhukow; Ravi Narayanaswamy; Jeffrey Olivier; Serguei Preis; Bratin Saha; et al. (OOPSLA, 2008)

Concurrent GC leveraging transactional memory. - Phil McGachey; Ali-Reza Adl-Tabatabai; Richard L. Hudson; Vijay Menon 002; Bratin Saha; Tatiana Shpeisman (PPoPP, 2008)

Practical weak-atomicity semantics for java stm. - Vijay Menon 002; Steven Balensiefer; Tatiana Shpeisman; Ali-Reza Adl-Tabatabai; Richard L. Hudson; Bratin Saha; Adam Welc (SPAA, 2008)

Irrevocable transactions and their applications. - Adam Welc; Bratin Saha; Ali-Reza Adl-Tabatabai (SPAA, 2008)

Kicking the tires of software transactional memory: why the going gets tough. - Richard M. Yoo; Yang Ni; Adam Welc; Bratin Saha; Ali-Reza Adl-Tabatabai; Hsien-Hsin S. Lee (SPAA, 2008)

Single global lock semantics in a weakly atomic STM. - Vijay Menon 002; Steven Balensiefer; Tatiana Shpeisman; Ali-Reza Adl-Tabatabai; Richard L. Hudson; Bratin Saha; Adam Welc (ACM SIGPLAN Notices, 2008)

Terascale chip multiprocessor memory hierarchy and programming model. - Shoumeng Yan; Xiaocheng Zhou; Ying Gao; Hu Chen; Sai Luo; Peinan Zhang; Naveen Cherukuri; Ronny Ronen; Bratin Saha (HiPC, 2009)

Model Checking Transactional Memory with Spin. - John W. O'Leary; Bratin Saha; Mark R. Tuttle (ICDCS, 2009)

Programming model for a heterogeneous x86 platform. - Bratin Saha; Xiaocheng Zhou; Hu Chen; Ying Gao; Shoumeng Yan; Mohan Rajagopalan; Jesse Fang; Peinan Zhang; Ronny Ronen; Avi Mendelson (PLDI, 2009)

Optimizing Memory Transactions for Multicore Systems. - Ali-Reza Adl-Tabatabai; Christos Kozyrakis; Bratin Saha (Multicore Processors and Systems, 2009)

CIRUS: a scalable modular architecture for reusable drivers. - Bratin Saha (DAC, 2011)

Optimizing a shared virtual memory system for a heterogeneous CPU-accelerator platform. - Shoumeng Yan; Xiaocheng Zhou; Ying Gao; Hu Chen; Gansha Wu; Sai Luo; Bratin Saha (ACM SIGOPS Oper. Syst. Rev., 2011)

Software Transactional Memory Validation - Time and Space Considerations. - Adam Welc; Bratin Saha (Trans. High Perform. Embed. Archit. Compil., 2011)