A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS. - Yorgos Palaskas; Ashoke Ravi; Stefano Pellerano; Brent R. Carlton; Mostafa A. Elmala; Ralph E. Bishop; Gaurab Banerjee; Rich B. Nicholls; Stanley K. Ling; Stewart S. Taylor; Krishnamurthy Soumyanath (ISSCC, 2006)

A 5-GHz 108-Mb/s 2 $ times$2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm ${ rm P}_{ rm 1dB}$ Power Amplifiers in 90-nm CMOS. - Yorgos Palaskas; Ashoke Ravi; Stefano Pellerano; Brent R. Carlton; Mostafa A. Elmala; Ralph E. Bishop; Gaurab Banerjee; Rich B. Nicholls; Stanley K. Ling; Nati Dinur; Stewart S. Taylor; Krishnamurthy Soumyanath (IEEE J. Solid State Circuits, 2006)

A Broadband Low-Cost Direct-Conversion Receiver Front-End in 90 nm CMOS. - Jing-Hong Conan Zhan; Brent R. Carlton; Stewart S. Taylor (IEEE J. Solid State Circuits, 2008)

32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. - Hasnain Lakdawala; Mark Schaecher; Chang-Tsung Fu; Rahul Dilip Limaye; Jon Duster; Yulin Tan; Ajay Balankutty; Erkan Alpman; Chun C. Lee; Satoshi Suzuki; Brent R. Carlton; Hyung Seok Kim; et al. (ISSCC, 2012)

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. - Yulin Tan; Jon Duster; Chang-Tsung Fu; Erkan Alpman; Ajay Balankutty; Chun C. Lee; Ashoke Ravi; Stefano Pellerano; Kailash Chandrashekar; Hyung Seok Kim; Brent R. Carlton; Satoshi Suzuki; et al. (VLSIC, 2012)

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. - Hasnain Lakdawala; Mark Schaecher; Chang-Tsung Fu; Rahul Dilip Limaye; Jon Duster; Yulin Tan; Ajay Balankutty; Erkan Alpman; Chun C. Lee; Khoa Minh Nguyen; Hyung-Jin Lee; Ashoke Ravi; et al. (IEEE J. Solid State Circuits, 2013)

13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications. - Paolo Madoglio; Hongtao Xu; Kailash Chandrashekar; Luis Cuellar 001; Muhammad Faisal; Yee William Li; Hyung Seok Kim; Khoa Minh Nguyen; Yulin Tan; Brent R. Carlton; Vaibhav A. Vaidya; Yanjie Wang; et al. (ISSCC, 2017)

A Scalable 71-to-76GHz 64-Element Phased-Array Transceiver Module with 2×2 Direct-Conversion IC in 22nm FinFET CMOS Technology. - Stefano Pellerano; Steven Callender; Woorim Shin; Yanjie Wang; Somnath Kundu; Abhishek Agrawal; Peter Sagazio; Brent R. Carlton; Farhana Sheikh; Arnaud Amadjikpe; William J. Lambert; Divya Shree Vemparala; et al. (ISSCC, 2019)

An Ultra-Low Power, Fully Integrated Wake-Up Receiver and Digital Baseband with All-Digital Impairment Correction and -92.4dBm Sensitivity for 802.11ba. - Richard Dorrance; Renzhi Liu; K. T. Asma Beevi; Deepak Dasalukunte; Mario A. Santana Lopez; Vinod Kristem; Shahrnaz Azizi; Brent R. Carlton (VLSI Circuits, 2019)

25.5 A Self-Calibrated 1.2-to-3.8GHz 0.0052mm2 Synthesized Fractional-N MDLL Using a 2b Time-Period Comparator in 22nm FinFET CMOS. - Somnath Kundu; Likai Chai; Kailash Chandrashekar; Stefano Pellerano; Brent R. Carlton (ISSCC, 2020)

19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers. - Bishnu Patra; Jeroen P. G. van Dijk; Sushil Subramanian; Andrea Corna; Xiao Xue 004; Charles Jeon; Farhana Sheikh; Esdras Juarez Hernandez; Brando Perez Esparza; Huzaifa Rampurawala; Brent R. Carlton; Nodar Samkharadze; et al. (ISSCC, 2020)

A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons. - Jeroen Petrus Gerardus van Dijk; Bishnu Patra; Sushil Subramanian; Xiao Xue 004; Nodar Samkharadze; Andrea Corna; Charles Jeon; Farhana Sheikh; Esdras Juarez Hernandez; Brando Perez Esparza; Huzaifa Rampurawala; Brent R. Carlton; et al. (IEEE J. Solid State Circuits, 2020)

An 802.11ba-Based Wake-Up Radio Receiver With Wi-Fi Transceiver Integration. - Renzhi Liu; K. T. Asma Beevi; Richard Dorrance; Deepak Dasalukunte; Vinod Kristem; Mario A. Santana Lopez; Alexander W. Min; Shahrnaz Azizi; Minyoung Park; Brent R. Carlton (IEEE J. Solid State Circuits, 2020)

A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS. - Hao Luo; Somnath Kundu; Chun C. Lee; Rinkle Jain; Sarah Shahraini; Eduardo Alban; Timo Huusari; Jason Mix; Nasser A. Kurd; Mohamed Abdel-moneum; Brent R. Carlton (CICC, 2021)

A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N MDLL in 22-nm FinFET CMOS. - Somnath Kundu; Likai Chai; Kailash Chandrashekar; Stefano Pellerano; Brent R. Carlton (IEEE J. Solid State Circuits, 2021)

A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology. - Steven Callender; Amy Whitcombe; Abhishek Agrawal; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Mark Chakravorti; Stefano Pellerano; Christopher D. Hull (ISSCC, 2022)

A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup. - Somnath Kundu; Timo Huusari; Hao Luo; Abhishek Agrawal; Eduardo Alban; Sarah Shahraini; Thao Xiong; Dan Lake; Stefano Pellerano; Jason Mix; Nasser A. Kurd; Mohamed Abdel-moneum; et al. (ISSCC, 2022)

A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference. - Hechen Wang; Renzhi Liu; Richard Dorrance; Deepak Dasalukunte; Xiaosen Liu; Dan Lake; Brent R. Carlton; May Wu (VLSI Technology and Circuits, 2022)

A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (VLSI Technology and Circuits, 2022)

A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET. - Steven Callender; Abhishek Agrawal; Amy Whitcombe; Ritesh Bhat; Mustafijur Rahman; Chun C. Lee; Peter Sagazio; Georgios C. Dogiamis; Brent R. Carlton; Christopher D. Hull; Stefano Pellerano (IEEE J. Solid State Circuits, 2022)

A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS. - Hao Luo; Somnath Kundu; Timo Huusari; Sarah Shahraini; Eduardo Alban; Jason Mix; Nasser A. Kurd; Mohamed Abdel-Moneum; Brent R. Carlton (IEEE J. Solid State Circuits, 2022)

A 128Gb/s 1.95pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher D. Hull; Steven Callender; Stefano Pellerano (ISSCC, 2023)

A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference. - Hechen Wang; Renzhi Liu; Richard Dorrance; Deepak Dasalukunte; Dan Lake; Brent R. Carlton (IEEE J. Solid State Circuits, 2023)

A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW. - Amy Whitcombe; Chun C. Lee; Asma Kuriparambil Thekkumpate; Somnath Kundu; Jaykant Timbadiya; Abhishek Agrawal; Brent R. Carlton; Peter Sagazio; Stefano Pellerano; Christopher D. Hull (IEEE J. Solid State Circuits, 2023)

A 2-Gb/s UWB Transceiver for Short-Range Reconfigurable FDD Wireless Networks. - Renzhi Liu; K. T. Asma Beevi; Richard Dorrance; Timothy F. Cox; Rinkle Jain; Tolga Acikalin; Zhen Zhou; Tae-Young Yang; Johanny Escobar-Pelaez; Shuhei Yamada; Kenneth P. Foust; Brent R. Carlton (IEEE J. Solid State Circuits, 2023)

An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET. - Richard Dorrance; Deepak Dasalukunte; Hechen Wang; Renzhi Liu; Brent R. Carlton (IEEE J. Solid State Circuits, 2023)

A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. - Abhishek Agrawal; Amy Whitcombe; Woorim Shin; Ritesh Bhat; Somnath Kundu; Peter Sagazio; Hariprasad Chandrakumar; Thomas William Brown; Brent R. Carlton; Christopher Dennis Hull; Steven Callender; Stefano Pellerano (IEEE J. Solid State Circuits, 2023)

22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking. - Amy Whitcombe; Somnath Kundu; Hariprasad Chandrakumar; Abhishek Agrawal; Thomas William Brown; Steven Callender; Brent R. Carlton; Stefano Pellerano (ISSCC, 2024)

A PVT Robust 8-Bit Signed Analog Compute-In-Memory Accelerator with Integrated Activation Functions for AI Applications. - Hechen Wang; Renzhi Liu; Richard Dorrance; Deepak Dasalukunte; Niranjan Gowda; Brent R. Carlton (VLSI Technology and Circuits, 2024)