Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding. - Partha Pratim Pande; Amlan Ganguly; Brett Feero; Benjamin Belzer; Cristian Grecu (DFT, 2006)

Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics. - Partha Pratim Pande; Amlan Ganguly; Brett Feero; Cristian Grecu (IOLTS, 2007)

Performance Evaluation for Three-Dimensional Networks-On-Chip. - Brett Feero; Partha Pratim Pande (ISVLSI, 2007)

Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation. - Brett Feero; Partha Pratim Pande (IEEE Trans. Computers, 2009)

Three-Dimensional Networks-on-Chip: Performance Evaluation. - Brett Stanley Feero; Partha Pratim Pande (3D Integration for NoC-based SoC Architectures, 2011)