Simulation of IBM Enterprise System/9000 Models 820 and 900. - Dennis F. Ackerman; Mark H. Decker; Joseph J. Gosselin; Kevin M. Lasko; Michael P. Mullen; Ruth E. Rosa; Ernest V. Valera; Bruce Wile (IBM J. Res. Dev., 1992)

Hierarchical Random Simulation Approach for the Verification of S/390 CMOS Multiprocessors. - Jörg A. Walter; Jens Leenstra; Gerhard Döttling; Bernd Leppla; Hans-Jürgen Münster; Kevin W. Kark; Bruce Wile (DAC, 1997)

Designer-level verification using TIMEDIAG/GENRAND. - Bruce Wile (IBM J. Res. Dev., 1997)

Functional verification of the CMOS S/390 Parallel Enterprise Server G4 system. - Bruce Wile; Michael P. Mullen; Cara Hanson; Dean G. Bair; Kevin M. Lasko; Patrick J. Duffy; Edward J. Kaminski Jr.; Thomas E. Gilbert; Steven M. Licker; Robert G. Sheldon; William D. Wollyung; William J. Lewis; et al. (IBM J. Res. Dev., 1997)

A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders. - Charles F. Webb; Carl J. Anderson; Leon J. Sigal; Kenneth L. Shepard; John S. Liptay; James D. Warnock; Brian W. Curran; Barry Krumm; Mark D. Mayo; Peter J. Camporese; Eric M. Schwarz; Mark S. Farrell; et al. (IEEE J. Solid State Circuits, 1997)

Teaching Future Verification Engineers: The Forgotten Side of Logic Design. - Füsun Özgüner; Duane W. Marhefka; Joanne DeGroat; Bruce Wile; Jennifer Stofer; Lyle Hanrahan (DAC, 2001)

Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system. - John M. Ludden; Wolfgang Roesner; Gerry M. Heiling; John R. Reysa; Jonathan R. Jackson; Bing-Lun Chu; Michael L. Behm; Jason Baumgartner; Richard D. Peterson; Jamee Abdulhafiz; William E. Bucy; John H. Klaus; et al. (IBM J. Res. Dev., 2002)