A Bandwidth-efficient Architecture for Media Processing. - Scott Rixner; William J. Dally; Ujval J. Kapasi; Brucek Khailany; Abelardo López-Lagunas; Peter R. Mattson; John D. Owens (MICRO, 1998)

Register Organization for Media Processing. - Scott Rixner; William J. Dally; Brucek Khailany; Peter R. Mattson; Ujval J. Kapasi; John D. Owens (HPCA, 2000)

Efficient conditional operations for data-parallel architectures. - Ujval J. Kapasi; William J. Dally; Scott Rixner; Peter R. Mattson; John D. Owens; Brucek Khailany (MICRO, 2000)

Imagine: Media Processing with Streams. - Brucek Khailany; William J. Dally; Ujval J. Kapasi; Peter R. Mattson; Jinyung Namkoong; John D. Owens; Brian Towles; Andrew Chang 001; Scott Rixner (IEEE Micro, 2001)

Comparing Reyes and OpenGL on a Stream Architecture. - John D. Owens; Brucek Khailany; Brian Towles; William J. Dally (Graphics Hardware, 2002)

The Imagine Stream Processor. - Ujval J. Kapasi; William J. Dally; Scott Rixner; John D. Owens; Brucek Khailany (ICCD, 2002)

VLSI Design and Verification of the Imagine Processor. - Brucek Khailany; William J. Dally; Andrew Chang 001; Ujval J. Kapasi; Jinyung Namkoong; Brian Towles (ICCD, 2002)

Exploring the VLSI Scalability of Stream Processors. - Brucek Khailany; William J. Dally; Scott Rixner; Ujval J. Kapasi; John D. Owens; Brian Towles (HPCA, 2003)

Programmable Stream Processors. - Ujval J. Kapasi; Scott Rixner; William J. Dally; Brucek Khailany; Jung Ho Ahn; Peter R. Mattson; John D. Owens (Computer, 2003)

Evaluating the Imagine Stream Architecture. - Jung Ho Ahn; William J. Dally; Brucek Khailany; Ujval J. Kapasi; Abhishek Das (ISCA, 2004)

Stream Processors: Progammability and Efficiency. - William J. Dally; Ujval J. Kapasi; Brucek Khailany; Jung Ho Ahn; Abhishek Das (ACM Queue, 2004)

A Programmable 512 GOPS Stream Processor for Signal, Image, and Video Processing. - Brucek Khailany; Ted Williams; Jim Lin; Eileen Peters Long; Mark Rygh; DeForest Tovey; William J. Dally (IEEE J. Solid State Circuits, 2008)

CudaDMA: optimizing GPU memory bandwidth via warp specialization. - Michael Bauer 001; Henry Cook; Brucek Khailany (SC, 2011)

GPUs and the Future of Parallel Computing. - Stephen W. Keckler; William J. Dally; Brucek Khailany; Michael Garland; David Glasco (IEEE Micro, 2011)

Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor. - Mark Gebhart; Stephen W. Keckler; Brucek Khailany; Ronny Krashinsky; William J. Dally (MICRO, 2012)

GPU design in a power-limited era. - Brucek Khailany (MSE, 2013)

A Pausible Bisynchronous FIFO for GALS Systems. - Ben Keller; Matthew Fojtik; Brucek Khailany (ASYNC, 2015)

Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive Clocks. - Divya Akella Kamakshi; Matthew Fojtik; Brucek Khailany; Sudhir S. Kudva; Yaping Zhou; Benton H. Calhoun (ASYNC, 2016)

A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applications. - Injoon Hong; Jason Clemons; Rangharajan Venkatesan; Iuri Frosio; Brucek Khailany; Stephen W. Keckler (DAC, 2016)

SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. - Angshuman Parashar; Minsoo Rhu; Anurag Mukkara; Antonio Puglielli; Rangharajan Venkatesan; Brucek Khailany; Joel S. Emer; Stephen W. Keckler; William J. Dally (ISCA, 2017)

A modular digital VLSI flow for high-productivity SoC design. - Brucek Khailany; Evgeni Khmer; Rangharajan Venkatesan; Jason Clemons; Joel S. Emer; Matthew Fojtik; Alicia Klinefelter; Michael Pellauer; Nathaniel Ross Pinckney; Yakun Sophia Shao; Shreesha Srinath; Christopher Torng; et al. (DAC, 2018)

Hardware-Enabled Artificial Intelligence. - William J. Dally; C. Thomas Gray; John Poulton; Brucek Khailany; John M. Wilson 002; Larry R. Dennison (VLSI Circuits, 2018)

A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET. - Matthew Fojtik; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Stephen G. Tell; Brian Zimmer; Tezaswi Raja; Kevin Zhou; William J. Dally; Brucek Khailany (ASYNC, 2019)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Shounak Dhar; Wuxi Li; Haoxing Ren; Brucek Khailany; David Z. Pan (DAC, 2019)

High Performance Graph Convolutional Networks with Applications in Testability Analysis. - Yuzhe Ma; Haoxing Ren; Brucek Khailany; Harbinder Sikka; Lijuan Luo; Karthikeyan Natarajan; Bei Yu 001 (DAC, 2019)

Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference. - Angad S. Rekhi; Brian Zimmer; Nikola Nedovic; Ningxi Liu; Rangharajan Venkatesan; Miaorong Wang; Brucek Khailany; William J. Dally; C. Thomas Gray (DAC, 2019)

PRIMAL: Power Inference using Machine Learning. - Yuan Zhou; Haoxing Ren; Yanqing Zhang 002; Ben Keller; Brucek Khailany; Zhiru Zhang (DAC, 2019)

A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. - Rangharajan Venkatesan; Yakun Sophia Shao; Brian Zimmer; Jason Clemons; Matthew Fojtik; Nan Jiang 009; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Stephen G. Tell; Yanqing Zhang 002; et al. (Hot Chips Symposium, 2019)

MAGNet: A Modular Accelerator Generator for Neural Networks. - Rangharajan Venkatesan; Yakun Sophia Shao; Miaorong Wang; Jason Clemons; Steve Dai; Matthew Fojtik; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Yanqing Zhang 002; Brian Zimmer; et al. (ICCAD, 2019)

Timeloop: A Systematic Approach to DNN Accelerator Evaluation. - Angshuman Parashar; Priyanka Raina; Yakun Sophia Shao; Yu-Hsin Chen; Victor A. Ying; Anurag Mukkara; Rangharajan Venkatesan; Brucek Khailany; Stephen W. Keckler; Joel S. Emer (ISPASS, 2019)

Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. - Yakun Sophia Shao; Jason Clemons; Rangharajan Venkatesan; Brian Zimmer; Matthew Fojtik; Nan Jiang 009; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Stephen G. Tell; Yanqing Zhang 002; et al. (MICRO, 2019)

A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. - Brian Zimmer; Rangharajan Venkatesan; Yakun Sophia Shao; Jason Clemons; Matthew Fojtik; Nan Jiang 009; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Stephen G. Tell; Yanqing Zhang 002; et al. (VLSI Circuits, 2019)

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. - Zhiyao Xie; Guan-Qi Fang; Yu-Hung Huang; Haoxing Ren; Yanqing Zhang 002; Brucek Khailany; Shao-Yun Fang; Jiang Hu; Yiran Chen 001; Erick Carvajal Barboza (ASP-DAC, 2020)

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. - Zhiyao Xie; Haoxing Ren; Brucek Khailany; Ye Sheng; Santosh Santosh; Jiang Hu; Yiran Chen 001 (ASP-DAC, 2020)

GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (DAC, 2020)

Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2020)

Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). - Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany (ICCAD, 2020)

Accelerating Chip Design with Machine Learning. - Brucek Khailany (MLCAD, 2020)

MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification. - Vidya A. Chhabria; Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany; Sachin S. Sapatnekar (CoRR, 2020)

A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. - Brian Zimmer; Rangharajan Venkatesan; Yakun Sophia Shao; Jason Clemons; Matthew Fojtik; Nan Jiang 009; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Stephen G. Tell; Yanqing Zhang 002; et al. (IEEE J. Solid State Circuits, 2020)

Accelerating Chip Design With Machine Learning. - Brucek Khailany; Haoxing Ren; Steve Dai; Saad Godil; Ben Keller; Robert Kirby 001; Alicia Klinefelter; Rangharajan Venkatesan; Yanqing Zhang 002; Bryan Catanzaro; William J. Dally (IEEE Micro, 2020)

ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs. - Yibo Lin; Wuxi Li; Jiaqi Gu 002; Haoxing Ren; Brucek Khailany; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Softermax: Hardware/Software Co-Design of an Efficient Softmax for Transformers. - Jacob R. Stevens; Rangharajan Venkatesan; Steve Dai; Brucek Khailany; Anand Raghunathan (DAC, 2021)

MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. - Vidya A. Chhabria; Yanqing Zhang 002; Haoxing Ren; Ben Keller; Brucek Khailany; Sachin S. Sapatnekar (DATE, 2021)

Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. - Mingjie Liu; Walker J. Turner; George F. Kokai; Brucek Khailany; David Z. Pan; Haoxing Ren (DATE, 2021)

2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. - Ghasem Pasandi; Sreedhar Pratty; David Brown; Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2021)

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs. - Nathaniel Ross Pinckney; Rangharajan Venkatesan; Ben Keller; Brucek Khailany (ICCAD, 2021)

Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper. - Haoxing Ren; Saad Godil; Brucek Khailany; Robert Kirby 001; Haiguang Liao; Siddhartha Nath; Jonathan Raiman; Rajarshi Roy 003 (ICCAD, 2021)

3.2 The A100 Datacenter GPU and Ampere Architecture. - Jack Choquette; Ming-Ju Edward Lee; Ronny Krashinsky; Vishnu Balan; Brucek Khailany (ISSCC, 2021)

VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. - Steve Dai; Rangharajan Venkatesan; Mark Ren; Brian Zimmer; William J. Dally; Brucek Khailany (MLSys, 2021)

Simba: scaling deep-learning inference with chiplet-based architecture. - Yakun Sophia Shao; Jason Clemons; Rangharajan Venkatesan; Brian Zimmer; Matthew Fojtik; Nan Jiang 009; Ben Keller; Alicia Klinefelter; Nathaniel Ross Pinckney; Priyanka Raina; Stephen G. Tell; Yanqing Zhang 002; et al. (Commun. ACM, 2021)

VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. - Steve Dai; Rangharajan Venkatesan; Haoxing Ren; Brian Zimmer; William J. Dally; Brucek Khailany (CoRR, 2021)

Verifying High-Level Latency-Insensitive Designs with Formal Model Checking. - Steve Dai; Alicia Klinefelter; Haoxing Ren; Rangharajan Venkatesan; Ben Keller; Nathaniel Ross Pinckney; Brucek Khailany (CoRR, 2021)

Low-Precision Training in Logarithmic Number System using Multiplicative Weight Update. - Jiawei Zhao; Steve Dai; Rangharajan Venkatesan; Ming-Yu Liu 001; Brucek Khailany; Bill Dally; Anima Anandkumar (CoRR, 2021)

NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. - Haoxing Ren; Matthew Fojtik; Brucek Khailany (CoRR, 2021)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Zixuan Jiang; Jiaqi Gu 002; Wuxi Li; Shounak Dhar; Haoxing Ren; Brucek Khailany; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Generative self-supervised learning for gate sizing: invited. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (DAC, 2022)

Generic lithography modeling with dual-band optics-inspired neural networks. - Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Mark Kilgard; Anima Anandkumar; Brucek Khailany; Vivek Singh; Haoxing Ren (DAC, 2022)

GATSPI: GPU accelerated gate-level simulation for power improvement. - Yanqing Zhang 002; Haoxing Ren; Akshay Sridharan; Brucek Khailany (DAC, 2022)

TransSizer: A Novel Transformer-Based Fast Gate Sizer. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (ICCAD, 2022)

Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training. - Charbel Sakr; Steve Dai; Rangharajan Venkatesan; Brian Zimmer; William J. Dally; Brucek Khailany (ICML, 2022)

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. - Dian-Lun Lin; Haoxing Ren; Yanqing Zhang 002; Brucek Khailany; Tsung-Wei Huang (ICPP, 2022)

AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies. - Hao Chen 059; Walker J. Turner; Sanquan Song; Keren Zhu 001; George F. Kokai; Brian Zimmer; C. Thomas Gray; Brucek Khailany; David Z. Pan; Haoxing Ren (ISPD, 2022)

XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. - Vidya A. Chhabria; Ben Keller; Yanqing Zhang 002; Sandeep Vollala; Sreedhar Pratty; Haoxing Ren; Brucek Khailany (MLCAD, 2022)

A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm. - Ben Keller; Rangharajan Venkatesan; Steve Dai; Stephen G. Tell; Brian Zimmer; William J. Dally; C. Thomas Gray; Brucek Khailany (VLSI Technology and Circuits, 2022)

Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training. - Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Anima Anandkumar; Brucek Khailany; Vivek Singh; Haoxing Ren (CoRR, 2022)

An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design. - Mingjie Liu; Haoyu Yang; Zongyi Li; Kumara Sastry; Saumyadip Mukhopadhyay; Selim Dogru; Anima Anandkumar; David Z. Pan; Brucek Khailany; Haoxing Ren (CoRR, 2022)

HEAT: Hardware-Efficient Automatic Tensor Decomposition for Transformer Compression. - Jiaqi Gu 002; Ben Keller; Jean Kossaifi; Anima Anandkumar; Brucek Khailany; David Z. Pan (CoRR, 2022)

LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update. - Jiawei Zhao; Steve Dai; Rangharajan Venkatesan; Brian Zimmer; Mustafa Fayez Ali; Ming-Yu Liu 001; Brucek Khailany; William J. Dally; Anima Anandkumar (IEEE Trans. Computers, 2022)

Efficient Transformer Inference with Statically Structured Sparse Attention. - Steve Dai; Hasan Genc; Rangharajan Venkatesan; Brucek Khailany (DAC, 2023)

Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation. - Rongjian Liang; Nathaniel Ross Pinckney; Yuji Chai; Haoxin Ren; Brucek Khailany (DAC, 2023)

GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. - Dian-Lun Lin; Yanqing Zhang 002; Haoxing Ren; Brucek Khailany; Shih-Hsin Wang; Tsung-Wei Huang (DAC, 2023)

Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation. - Mingjie Liu; Nathaniel Ross Pinckney; Brucek Khailany; Haoxing Ren (ICCAD, 2023)

An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling. - Mingjie Liu; Haoyu Yang; Brucek Khailany; Haoxing Ren (ICCAD, 2023)

AutoDMP: Automated DREAMPlace-based Macro Placement. - Anthony Agnesina; Puranjay Rajvanshi; Tian Yang; Geraldo Pradipta; Austin Jiao; Ben Keller; Brucek Khailany; Haoxing Ren (ISPD, 2023)

NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. - Chia-Tung Ho; Alvin Ho; Matthew Fojtik; Minsoo Kim; Shang Wei; Yaguang Li; Brucek Khailany; Haoxing Ren (ISPD, 2023)

VerilogEval: Evaluating Large Language Models for Verilog Code Generation. - Mingjie Liu; Nathaniel Ross Pinckney; Brucek Khailany; Haoxing Ren (CoRR, 2023)

ChipNeMo: Domain-Adapted LLMs for Chip Design. - Mingjie Liu; Teodor-Dumitru Ene; Robert Kirby 001; Chris Cheng; Nathaniel Ross Pinckney; Rongjian Liang; Jonah Alben; Himyanshu Anand; Sanmitra Banerjee; Ismet Bayraktaroglu; Bonita Bhaskaran; Bryan Catanzaro; et al. (CoRR, 2023)

A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. - Ben Keller; Rangharajan Venkatesan; Steve Dai; Stephen G. Tell; Brian Zimmer; Charbel Sakr; William J. Dally; C. Thomas Gray; Brucek Khailany (IEEE J. Solid State Circuits, 2023)

Machine Learning and Algorithms: Let Us Team Up for EDA. - Haoxing Ren; Brucek Khailany; Matthew Fojtik; Yanqing Zhang 002 (IEEE Des. Test, 2023)

GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method. - Yanqing Zhang 002; Haoxing Ren; Brucek Khailany (ICCAD, 2024)

PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs. - Christopher Batten; Nathaniel Ross Pinckney; Mingjie Liu; Haoxing Ren; Brucek Khailany (MLCAD, 2024)

ESPACE: Dimensionality Reduction of Activations for Model Compression. - Charbel Sakr; Brucek Khailany (NeurIPS, 2024)

Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks. - Nathaniel Ross Pinckney; Christopher Batten; Mingjie Liu; Haoxing Ren; Brucek Khailany (CoRR, 2024)

VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool. - Chia-Tung Ho; Haoxing Ren; Brucek Khailany (AAAI, 2025)

SQ-DM: Accelerating Diffusion Models with Aggressive Quantization and Temporal Sparsity. - Zichen Fan; Steve Dai; Rangharajan Venkatesan; Dennis Sylvester; Brucek Khailany (CoRR, 2025)

BCQ: Block Clustered Quantization for 4-bit (W4A4) LLM Inference. - Reena Elangovan; Charbel Sakr; Anand Raghunathan; Brucek Khailany (CoRR, 2025)

GauRast: Enhancing GPU Triangle Rasterizers to Accelerate 3D Gaussian Splatting. - Sixu Li; Ben Keller; Yingyan Celine Lin; Brucek Khailany (CoRR, 2025)

Marco: Configurable Graph-Based Task Solving and Multi-AI Agents Framework for Hardware Design. - Chia-Tung Ho; Jing Gong; Yunsheng Bai; Chenhui Deng; Haoxing Ren; Brucek Khailany (CoRR, 2025)

FGMP: Fine-Grained Mixed-Precision Weight and Activation Quantization for Hardware-Accelerated LLM Inference. - Coleman Hooper; Charbel Sakr; Ben Keller; Rangharajan Venkatesan; Kurt Keutzer; Yakun Sophia Shao; Brucek Khailany (CoRR, 2025)

Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification. - Nathaniel Ross Pinckney; Chenhui Deng; Chia-Tung Ho; Yun-Da Tsai; Mingjie Liu; Wenfei Zhou; Brucek Khailany; Haoxing Ren (CoRR, 2025)