Cache coherency communication cost in a NoC-based MPSoC platform. - Gustavo Girão; Bruno Cruz de Oliveira; Rodrigo Soares; Ivan Saraiva Silva (SBCCI, 2007)

RoSA: a reconfigurable stream-based architecture. - Monica Magalhães Pereira; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SBCCI, 2007)

Using traditional loop unrolling to fit application on a new hybrid reconfigurable architecture. - Monica Magalhães Pereira; Sílvio R. F. de Araújo; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SAC, 2008)

Using NoC routers as processing elements. - Sílvio R. F. de Fernandes; Bruno Cruz de Oliveira; Ivan Saraiva Silva (SBCCI, 2009)

Processing while routing: a network-on-chipbased parallel system. - Sílvio R. F. de Fernandes; Bruno Cruz de Oliveira; M. Costa; Ivan Saraiva Silva (IET Comput. Digit. Tech., 2009)

Exploring memory organization in virtual MP-SoC platforms. - Bruno Cruz de Oliveira; Márcio Eduardo Kreutz; Edgard de Faria Corrêa; Ivan Saraiva Silva (SBCCI, 2010)

Adapting a C-element design flow for low power. - Matheus T. Moreira; Bruno Cruz de Oliveira; Julian J. H. Pontes; Fernando Moraes 001; Ney Calazans (ICECS, 2011)

A 65nm standard cell set and flow dedicated to automated asynchronous circuits design. - Matheus T. Moreira; Bruno Cruz de Oliveira; Julian J. H. Pontes; Ney Calazans (SoCC, 2011)

Impact of C-elements in asynchronous circuits. - Matheus T. Moreira; Bruno Cruz de Oliveira; Fernando Moraes 001; Ney Calazans (ISQED, 2012)