Complete Proof Systems for First Order Interval Temporal Logic - Bruno Dutertre (LICS, 1995)

The practice of formal methods in safety-critical systems. - Shaoying Liu; Victoria Stavridou; Bruno Dutertre (J. Syst. Softw., 1995)

Elements of Mathematical Analysis in PVS. - Bruno Dutertre (TPHOLs, 1996)

Using a PVS Embedding of CSP to Verify Authentication Protocols. - Bruno Dutertre; Steve A. Schneider (TPHOLs, 1997)

Formal Requirements Analysis of an Avionics Control System. - Bruno Dutertre; Victoria Stavridou (IEEE Trans. Software Eng., 1997)

A Formalization of Software Architecture. - John Herbert; Bruno Dutertre; Robert A. Riemenschneider; Victoria Stavridou (World Congress on Formal Methods, 1999)

Formal Analysis of the Priority Ceiling Protocol. - Bruno Dutertre (RTSS, 2000)

Intrusion-Tolerant Group Management in Enclaves. - Bruno Dutertre; Hassen Saïdi; Victoria Stavridou (DSN, 2001)

Dynamic Scan Scheduling. - Bruno Dutertre (RTSS, 2002)

Intrusion-Tolerant Enclaves. - Bruno Dutertre; Valentin Crettaz; Victoria Stavridou (S&P, 2002)

An Architecture for an Adaptive Intrusion-Tolerant Server. - Alfonso Valdes; Magnus Almgren; Steven Cheung; Yves Deswarte; Bruno Dutertre; Joshua Levy; Hassen Saïdi; Victoria Stavridou; Tomás E. Uribe (Security Protocols Workshop, 2002)

Forum Session: Security for Wireless Sensor Networks. - David Carman; Daniel Coffin; Bruno Dutertre; Vipin Swarup; Ronald J. Watro (ACSAC, 2003)

Self-regenerative software components. - Hassen Saïdi; Bruno Dutertre; Joshua Levy; Alfonso Valdes (SSRS@CCS, 2003)

Dependable Intrusion Tolerance: Technology Demo. - Alfonso Valdes; Magnus Almgren; Steven Cheung; Yves Deswarte; Bruno Dutertre; Joshua Levy; Hassen Saïdi; Victoria Stavridou; Tomás E. Uribe (DISCEX (2), 2003)

Protocol Codesign. - Hassen Saïdi; Victoria Stavridou; Bruno Dutertre (Security Protocols Workshop, 2003)

Modeling and Verification of a Fault-Tolerant Real-Time Startup Protocol Using Calendar Automata. - Bruno Dutertre; Maria Sorea (FORMATS/FTRTFT, 2004)

Feature-Based Decomposition of Inductive Proofs Applied to Real-Time Avionics Software: An Experience Report. - Vu Ha; Murali Rangarajan; Darren D. Cofer; Harald Rueß; Bruno Dutertre (ICSE, 2004)

Using Model Checking to Assess the Dependability of Agent-Based Systems. - Robert A. Riemenschneider; Hassen Saïdi; Bruno Dutertre (IEEE Intell. Syst., 2004)

Detecting Disruptive Routers in Wireless Sensor Networks. - Steven Cheung; Bruno Dutertre; Ulf Lindqvist (ADHOC-NOW, 2006)

A Fast Linear-Arithmetic Solver for DPLL(T). - Bruno Dutertre; Leonardo Mendonça de Moura (CAV, 2006)

A Tutorial on Satisfiability Modulo Theories. - Leonardo Mendonça de Moura; Bruno Dutertre; Natarajan Shankar (CAV, 2007)

Formal Modeling and Analysis of the Modbus Protocol. - Bruno Dutertre (Critical Infrastructure Protection, 2007)

Modeling and Verification of Time-Triggered Communication Protocols. - Maria Sorea; Bruno Dutertre; Wilfried Steiner (ISORC, 2008)

SMT-Based Formal Verification of a TTEthernet Synchronization Function. - Wilfried Steiner; Bruno Dutertre (FMICS, 2010)

Automated Formal Verification of the TTEthernet Synchronization Quality. - Wilfried Steiner; Bruno Dutertre (NASA Formal Methods, 2011)

Layered Diagnosis and Clock-Rate Correction for the TTEthernet Clock Synchronization Protocol. - Wilfried Steiner; Bruno Dutertre (PRDC, 2011)

Simplex with sum of infeasibilities for SMT. - Tim King 001; Clark W. Barrett; Bruno Dutertre (FMCAD, 2013)

The TTEthernet synchronisation protocols and their formal verification. - Wilfried Steiner; Bruno Dutertre (Int. J. Crit. Comput. Based Syst., 2013)

Yices 2.2. - Bruno Dutertre (CAV, 2014)

Template-based circuit understanding. - Adrià Gascón; Pramod Subramanyan; Bruno Dutertre; Ashish Tiwari 001; Dejan Jovanovic; Sharad Malik (FMCAD, 2014)

Safety envelope for security. - Ashish Tiwari 001; Bruno Dutertre; Dejan Jovanovic; Thomas de Candia; Patrick Lincoln; John M. Rushby; Dorsa Sadigh; Sanjit A. Seshia (HiCoNS, 2014)

Program Synthesis Using Dual Interpretation. - Ashish Tiwari 001; Adrià Gascón; Bruno Dutertre (CADE, 2015)

Double Helix and RAVEN: A System for Cyber Fault Tolerance and Recovery. - Michele Co; Jack W. Davidson; Jason D. Hiser; John C. Knight; Anh Nguyen-Tuong; Westley Weimer; Jonathan Burket; Gregory L. Frazier; Tiffany M. Frazier; Bruno Dutertre; Ian A. Mason; Natarajan Shankar; et al. (CISRC, 2016)

Property-directed k-induction. - Dejan Jovanovic; Bruno Dutertre (FMCAD, 2016)

LibPoly: A Library for Reasoning about Polynomials. - Dejan Jovanovic; Bruno Dutertre (SMT, 2017)

Verification of Fault-Tolerant Protocols with Sally. - Bruno Dutertre; Dejan Jovanovic; Jorge A. Navas (NFM, 2018)

Solving Bitvectors with MCSAT: Explanations from Bits and Pieces. - Stéphane Graham-Lengrand; Dejan Jovanovic; Bruno Dutertre (IJCAR (1), 2020)

An Empirical Evaluation of SAT Solvers on Bit-vector Problems. - Bruno Dutertre (SMT, 2020)

Verification of an Optimized NTT Algorithm. - Jorge A. Navas; Bruno Dutertre; Ian A. Mason (VSTTE, 2020)

Solving bitvectors with MCSAT: explanations from bits and pieces (long version). - Stéphane Graham-Lengrand; Dejan Jovanovic; Bruno Dutertre (CoRR, 2020)

Interpolation and Model Checking for Nonlinear Arithmetic. - Dejan Jovanovic; Bruno Dutertre (CAV (2), 2021)

Solving String Constraints Using SAT. - Kevin Lotz; Amit Goel; Bruno Dutertre; Benjamin Kiesl-Reiter; Soonho Kong; Rupak Majumdar; Dirk Nowotka (CAV (2), 2023)

Generating and Exploiting Automated Reasoning Proof Certificates. - Haniel Barbosa; Clark W. Barrett; Byron Cook; Bruno Dutertre; Gereon Kremer; Hanna Lachnitt; Aina Niemetz; Andres Nötzli; Alex Ozdemir; Mathias Preiner; Andrew Reynolds 001; Cesare Tinelli; et al. (Commun. ACM, 2023)

SMT-D: New Strategies for Portfolio-Based SMT Solving. - Clark W. Barrett; Pei-Wei Chen; Byron Cook; Bruno Dutertre; Robert B. Jones; Nham Le; Andrew Reynolds 001; Kunal Sheth; Christopher Stephens; Michael W. Whalen (FMCAD, 2024)

Extending DRAT to SMT. - S. Hitarth; Cayden R. Codel; Hanna Lachnitt; Bruno Dutertre (FMCAD, 2024)

Solving String Constraints with Concatenation Using SAT. - Kevin Lotz; Amit Goel; Bruno Dutertre; Benjamin Kiesl-Reiter; Soonho Kong; Dirk Nowotka (FMCAD, 2024)

Quantum Circuit Mapping Based on Incremental and Parallel SAT Solving. - Jiong Yang 002; Yaroslav A. Kharkov; Yunong Shi; Marijn J. H. Heule; Bruno Dutertre (SAT, 2024)