Earthquake - A NoC-based optimized differential cache-collision attack for MPSoCs. - Cezar Reinbrecht; Bruno Endres Forlin; Andreas Zankl; Johanna Sepúlveda (DATE, 2018)

Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable. - Bruno Endres Forlin; Cezar Reinbrecht; Johanna Sepúlveda (VLSI-SoC, 2019)

Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs. - Bruno Endres Forlin; Cezar Reinbrecht; Johanna Sepúlveda (VLSI-SoC (Selected Papers), 2019)

Cache timing attacks on NoC-based MPSoCs. - Cezar Reinbrecht; Bruno Endres Forlin; Johanna Sepúlveda (Microprocess. Microsystems, 2019)

G-PUF: An Intrinsic PUF Based on GPU Error Signatures. - Bruno Endres Forlin; Ronaldo Husemann; Luigi Carro; Cezar Reinbrecht; Said Hamdioui; Mottaqiallah Taouil (ETS, 2020)

Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs. - Cezar Reinbrecht; Abdullah Aljuffri; Said Hamdioui; Mottaqiallah Taouil; Bruno Endres Forlin; Johanna Sepúlveda (ISVLSI, 2020)

Providing Plug N' Play for Processing-in-Memory Accelerators. - Paulo C. Santos 001; Bruno E. Forlin; Luigi Carro (ASP-DAC, 2021)

Sim2PIM: A Fast Method for Simulating Host Independent & PIM Agnostic Designs. - Paulo C. Santos 001; Bruno E. Forlin; Luigi Carro (DATE, 2021)

Aggressive Performance Improvement on Processing-in-Memory Devices by Adopting Hugepages. - Paulo Cesar Santos 001; Bruno E. Forlin; Marco A. Z. Alves; Luigi Carro (ASAP, 2022)

Sim2PIM: A complete simulation framework for Processing-in-Memory. - Bruno E. Forlin; Paulo C. Santos 001; Augusto E. Becker; Marco A. Z. Alves; Luigi Carro (J. Syst. Archit., 2022)

Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs. - Kevin Böhmer; Bruno Endres Forlin; Carlo Cazzaniga; Paolo Rech; Gianluca Furano; Nikolaos Alachiotis 001; Marco Ottavi (DFT, 2023)

An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds? - Bruno E. Forlin; Wouter van Huffelen; Carlo Cazzaniga; Paolo Rech; Nikolaos Alachiotis 001; Marco Ottavi (ETS, 2023)

Plug N' PIM: An integration strategy for Processing-in-Memory accelerators. - Paulo C. Santos 001; Bruno E. Forlin; Marco A. Z. Alves; Luigi Carro (Integr., 2023)

Lightweight Instrumentation for Accurate Performance Monitoring in RTOSes. - Bruno Endres Forlin; Kuan-Hsun Chen; Nikolaos Alachiotis 001; Luca Cassano; Marco Ottavi (DATE, 2024)

An Experimental Comparison of RISC-V Processors: Performance, Power, Area and Security - Special Session Paper-. - Elia Lazzeri; Bruno E. Forlin; Gianluca Furano; Marco Ottavi; Luca Cassano (DFT, 2024)

An Enhanced Fault Injection Framework for FPGA-Based Soft-Cores. - Tijmen T. Smit; Bruno E. Forlin; Kuan-Hsun Chen; Ioanna Souvatzoglou; Mihalis Psarakis; Marco Ottavi (DFT, 2024)

Neutron Beam Evaluation of Probabilistic Data Structure-based Online Checkers. - Bruno Endres Forlin; Edian B. Annink; Elijah Cishugi; Carlo Cazzaniga; Paolo Rech; Gerard K. Rauwerda; Gianluca Furano; Marco Ottavi (IOLTS, 2024)

Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC. - Michael Rogenmoser; Philip Wiese; Bruno E. Forlin; Frank K. Gürkaynak; Paolo Rech; Alessandra Menicucci; Marco Ottavi; Luca Benini (CoRR, 2024)

Bloom Filters for Soft Error Detection: Neutron and Fault Injection Validation. - Elijah Seth Cishugi; Tijmen T. Smit; Bruno E. Forlin; Carlo Cazzaniga; Kuan-Hsun Chen; Marco Ottavi (IOLTS, 2025)

FPGA Innovation Research in the Netherlands: Present Landscape and Future Outlook. - Nikolaos Alachiotis 001; Sjoerd van den Belt; Steven van der Vlugt; Reinier van der Walle; Mohsen Safari; Bruno Endres Forlin; Tiziano De Matteis; Zaid Al-Ars; Roel Jordans; António J. Sousa de Almeida; Federico Corradi; Christiaan Baaij; et al. (CoRR, 2025)

InTreeger: An End-to-End Framework for Integer-Only Decision Tree Inference. - Duncan Bart; Bruno Endres Forlin; Ana Lucia Varbanescu; Marco Ottavi; Kuan-Hsun Chen (CoRR, 2025)