A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver. - Keun-Mok Kim; Eui-Rim Jeong; Kyung-Sik Choi; Subin Kim; Byeonghun Yun; Hyunki Jung; Wonkab Oh; Jinho Ko; Sang-Gug Lee 001 (ESSCIRC, 2019)

29.7 A 490GHz 32mW Fully Integrated CMOS Receiver Adopting Dual-Locking FLL. - Kyung-Sik Choi; Dzuhri Radityo Utomo; Keun-Mok Kim; Byeonghun Yun; Sang-Gug Lee 001; In-Young Lee (ISSCC, 2020)

A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. - Dzuhri Radityo Utomo; Dae-Woong Park; Byeonghun Yun; Sang-Gug Lee 001 (VLSI Circuits, 2020)

245/243GHz, 9.2/10.5dBm Saturated Output Power, 4.6/2.8% PAE, and 28/26dB Gain Power Amplifiers in 65nm CMOS Adopting 2-and 4-way Power Combining. - Byeonghun Yun; Dae-Woong Park; Kyung-Sik Choi; Ho-Jin Song; Sang-Gug Lee 001 (A-SSCC, 2021)

A D-Band Power Amplifier in 65-nm CMOS by Adopting Simultaneous Output Power-and Gain-Matched Gmax-Core. - Dae-Woong Park; Dzuhri Radityo Utomo; Byeonghun Yun; Hafiz Usman Mahmood; Sang-Gug Lee 001 (IEEE Access, 2021)

A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks. - Keun-Mok Kim; Hyun-Gi Seok; Oh-Yong Jung; Kyung-Sik Choi; Byeonghun Yun; Subin Kim; Wonkab Oh; Eui-Rim Jeong; Jinho Ko; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2021)

Design of High-Gain Sub-THz Regenerative Amplifiers Based on Double-Gmax Gain Boosting Technique. - Dae-Woong Park; Dzuhri Radityo Utomo; Byeonghun Yun; Hafiz Usman Mahmood; Jong-Phil Hong; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2021)

An LPWAN Radio with a Reconfigurable Data/Duty-Cycled-Wake-Up Receiver. - Keun-Mok Kim; Kyung-Sik Choi; Hyunki Jung; Byeonghun Yun; Subin Kim; Wonkab Oh; Eui-Soo Lee; Sujin Park; Eui-Rim Jeong; Jinho Ko; Sang-Gug Lee 001 (ISSCC, 2022)

Analysis and Design of Power-Efficient H-Band CMOS Frequency Doubler Employing Gain Boosting and Harmonic Enhancing Techniques. - Byeong-Taek Moon; Byeonghun Yun; Jusung Kim; Sang-Gug Lee 001 (IEEE Access, 2023)

A -124-dBm Sensitivity Interference-Resilient Direct-Conversion Duty-Cycled Wake-Up Receiver Achieving 0.114 mW at 1.966-s Wake-Up Latency. - Keun-Mok Kim; Kyung-Sik Choi; Hyunki Jung; Byeonghun Yun; Jinglong Xu; Jinho Ko; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2023)

A 250-GHz Wideband Direct-Conversion CMOS Receiver Adopting Baseband Equalized Low-Loss Resistive Passive Mixer. - Hyo-Ryeong Jeon; Byeonghun Yun; Ho-Keun Lee; Sang-Gug Lee 001; Kyung-Sik Choi (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

H-Band Power Amplifiers in 65-nm CMOS by Adopting Output Power Maximized Gmax-Core and Transmission Line-Based Zero-Degree Power Combining Networks. - Byeonghun Yun; Dae-Woong Park; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2023)

High-Power 150/245-GHz Fundamental Oscillators With 12.1/-2.54-dBm Peak Output Power for Phased Array Transceivers. - Abdul Qahir; Dzuhri Radityo Utomo; Byeonghun Yun; Kyung-Sik Choi; Dae-Woong Park; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2024)