An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules. - S. Y. Kim; Emre Tuncer; Rohini Gupta; Byron Krauter; Thomas L. Savarino; Dean P. Neikirk; Lawrence T. Pillage (ICCAD, 1993)

The Elmore Delay as a Bound for RC Trees with Generalized Input Signals. - Rohini Gupta; Byron Krauter; Bogdan Tutuianu; John Willis; Lawrence T. Pileggi (DAC, 1995)

Transmission Line Synthesis. - Byron Krauter; Rohini Gupta; John Willis; Lawrence T. Pileggi (DAC, 1995)

Generating sparse partial inductance matrices with guaranteed stability. - Byron Krauter; Lawrence T. Pileggi (ICCAD, 1995)

A Sparse Image Method for BEM Capacitance Extraction. - Byron Krauter; Yu Xia; E. Aykut Dengi; Lawrence T. Pileggi (DAC, 1996)

On Moment-Based Metric for Optimal Termination of Transmission Line Interconnects. - Rohini Gupta; Byron Krauter; Lawrence T. Pileggi (VLSI Design, 1996)

Transmission line synthesis via constrained multivariable optimization. - Rohini Gupta; Byron Krauter; Lawrence T. Pileggi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis. - Byron Krauter; Sharad Mehrotra (DAC, 1998)

Including inductive effects in interconnect timing analysis. - Byron Krauter; Sharad Mehrotra; V. Chandramouli (CICC, 1999)

A realizable driving point model for on-chip interconnect with inductance. - Chandramouli V. Kashyap; Byron Krauter (DAC, 2000)

R(f)L(f)C coupled noise evaluation of an S/390 microprocessor chip. - Howard H. Smith; Aline Deutsch; Sharad Mehrotra; David Widiger; Michael A. Bowen; Allan H. Dansky; Gerard V. Kopcsay; Byron Krauter (CICC, 2001)

A clock distribution network for microprocessors. - Phillip J. Restle; Timothy G. McNamara; David A. Webber; Peter J. Camporese; Kwok F. Eng; Keith A. Jenkins; David H. Allen; Michael J. Rohn; Michael P. Quaranta; David W. Boerstler; Charles J. Alpert; Craig A. Carter; et al. (IEEE J. Solid State Circuits, 2001)

On-chip wiring design challenges for gigahertz operation. - Alina Deutsch; Paul W. Coteus; Gerard V. Kopcsay; Howard H. Smith; Christopher W. Surovic; Byron Krauter; Daniel C. Edelstein; Phillip J. Restle (Proc. IEEE, 2001)

Equipotential shells for efficient inductance extraction. - Michael W. Beattie; Byron Krauter; Lale Alatan; Lawrence T. Pileggi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax. - Byron Krauter; David Widiger (DAC, 2002)

Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses. - Hui Zheng; Lawrence T. Pileggi; Michael W. Beattie; Byron Krauter (DATE, 2002)

Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. - Masud H. Chowdhury; Yehea I. Ismail; Chandramouli V. Kashyap; Byron Krauter (ISCAS (4), 2002)

The circuit and physical design of the POWER4 microprocessor. - James D. Warnock; John M. Keaty; John G. Petrovick; Joachim G. Clabes; Charles J. Kircher; Byron Krauter; Phillip J. Restle; Brian A. Zoric; Carl J. Anderson (IBM J. Res. Dev., 2002)

Guest editorial: special issue on on-chip inductance in high-speed integrated circuits. - Yehea I. Ismail; Byron Krauter (IEEE Trans. Very Large Scale Integr. Syst., 2002)

A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis. - Gerard V. Kopcsay; Byron Krauter; David Widiger; Alina Deutsch; Barry J. Rubin; Howard H. Smith (IEEE Trans. Very Large Scale Integr. Syst., 2002)

On-package decoupling optimization with package macromodels. - Hui Zheng; Byron Krauter; Lawrence T. Pileggi (CICC, 2003)

Realizable reduction of RLC circuits using node elimination. - Masud H. Chowdhury; Chirayu S. Amin; Yehea I. Ismail; Chandramouli V. Kashyap; Byron Krauter (ISCAS (3), 2003)

Electrical Modeling of Integrated-Package Power and Ground Distributions. - Hui Zheng; Byron Krauter; Lawrence T. Pileggi (IEEE Des. Test Comput., 2003)

Spatially distributed 3D circuit models. - Michael W. Beattie; Hui Zheng; Anirudh Devgan; Byron Krauter (DAC, 2005)

A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis. - Haihua Su; David Widiger; Chandramouli V. Kashyap; Frank Liu 001; Byron Krauter (DAC, 2005)

Modeling and Design of Chip-Package Interface. - Anirudh Devgan; Luca Daniel; Byron Krauter; Lei He 001 (ISQED, 2005)