A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme. - Yeonbae Chung; Byung-Gil Jeon; Kang-Deog Suh (IEEE J. Solid State Circuits, 2000)

A 0.4-μm 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit. - Byung-Gil Jeon; Mun-Kyu Choi; Yoonjong Song; Seung-Kyu Oh; Yeonbae Chung; Kang-Deog Suh; Kinam Kim (IEEE J. Solid State Circuits, 2000)

A 0.25-μm 3.0-V 1T1C 32-Mb nonvolatile ferroelectric RAM with address transition detector and current forcing latch sense amplifier scheme. - Mun-Kyu Choi; Byung-Gil Jeon; Nakwon Jang; Byung-Jun Min; Yoon-Jong Song; Sung-Yung Lee; Hyun-Ho Kim; Dong-Jin Jung; Heung-Jin Joo; Kinam Kim (IEEE J. Solid State Circuits, 2002)

An embedded nonvolatile FRAM with electrical fuse repair scheme and one time programming scheme for high performance smart cards. - ByungJun Min; Kang-Woon Lee; Han-Ju Lee; So-Ra Kim; Seung-Gyu Oh; Byung-Gil Jeon; Hee-Hyun Yang; Min-Kyu Kim; Sung-Hee Cho; Honsik Cheong; Chilhee Chung; Kinam Kim (CICC, 2005)

FRASH: Hierarchical File System for FRAM and Flash. - Eun-ki Kim; Hyungjong Shin; Byung-Gil Jeon; Seokhee Han; Jaemin Jung; Youjip Won (ICCSA (1), 2007)

A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. - Daeyeal Lee; Ik Joon Chang; Sangyong Yoon; Joonsuc Jang; Dong-Su Jang; Wook-Ghee Hahn; Jong-Yeol Park; Doo-Gon Kim; Chiweon Yoon; Bong-Soon Lim; ByungJun Min; Sung-Won Yun; et al. (ISSCC, 2012)