Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory. - Byung-Kwon An; Xueyong Zhang; Anh Tuan Do; Tony Tae-Hyoung Kim (NEWCAS, 2023)

A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory. - Xueyong Zhang; Byung-Kwon An; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Reference-Free Dual-Mode Cell-to-Cell Sensing for Area-Efficient Resistive Memory. - Byung-Kwon An; Tony Tae-Hyoung Kim (APCCAS, 2024)

Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory. - Byung-Kwon An; Xueyong Zhang; Anh Tuan Do; Tony Tae-Hyoung Kim (ISCAS, 2024)

A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation. - Junjie Mu; Lu Lu 013; Ju Eon Kim; Byung-Kwon An; Vishal Sharma 004; Arya Jagath Lekshmi; Putu Andhita Dananjaya; Weng Hong Lai; Wen Siang Lew; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 1Mb RRAM Macro with Bipolar Forming for Improved Programming Yield and Cell-by-cell Write Verification Scheme. - Byungkwon An; Junjie Mu; Putu Andhita Dananjaya; Weng Hong Lai; Wen Siang Lew; Tony Tae-Hyoung Kim (ISCAS, 2025)