Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology. - F. Griggio; James Palmer 002; F. Pan; N. Toledo; Anthony Schmitz; Ilan Tsameret; R. Kasim; Gerald S. Leatherman; Jeffery Hicks; A. Madhavan; J. Shin; J. Steigerwald; et al. (IRPS, 2018)

A Reliability Overview of Intel's 10+ Logic Technology. - Rohit Grover; Tony Acosta; C. AnDyke; Emre Armagan; C. Auth; Sunny Chugh; K. Downes; M. Hattendorf; N. Jack; S. Joshi; R. Kasim; Gerald S. Leatherman; et al. (IRPS, 2020)

Reliability Characteristics of a High Density Metal- Insulator-Metal Capacitor on Intel's 10+ Process. - Cheyun Lin; Uygar E. Avci; M. A. Blount; Rohit Grover; Jeffery Hicks; R. Kasim; A. Kundu; C. M. Pelto; C. Ryder; Anthony Schmitz; K. Sethi; D. Seghete; et al. (IRPS, 2020)

An Intel 3 Advanced FinFET Platform Technology for High Performance Computing and SOC Product Applications. - Walid M. Hafez; D. Abanulo; M. Abdelkader; S. An; C. Auth; D. Bahr; V. Balakrishnan; Rohan Bambery; M. Beck; M. Bhargava; S. Bhowmick; J. Biggs-houck; et al. (VLSI Technology and Circuits, 2024)