Logic Synthesis Through Local Transformations. - John A. Darringer; William H. Joyner Jr.; C. Leonard Berman; Louise Trevillyan (IBM J. Res. Dev., 1981)

Global Flow Analysis in Automatic Logic Design. - Louise Trevillyan; William H. Joyner Jr.; C. Leonard Berman (IEEE Trans. Computers, 1986)

Improved logic optimization using global flow analysis. - C. Leonard Berman; Louise Trevillyan (ICCAD, 1988)

Functional comparison of logic designs for VLSI circuits. - C. Leonard Berman; Louise Trevillyan (ICCAD, 1989)

Ordered binary decision diagrams and circuit structure. - C. Leonard Berman (ICCD, 1989)

Generation of performance constraints for layout. - Ravi Nair; C. Leonard Berman; Peter S. Hauge; Ellen J. Yoffa (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Circuit width, register allocation, and ordered binary decision diagrams. - C. Leonard Berman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Global flow optimization in automatic logic design. - C. Leonard Berman; Louise Trevillyan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Grid-Multipole Calculations. - C. Leonard Berman (SIAM J. Sci. Comput., 1995)