Impact of neutron irradiation on the RF properties of oxidized high-resistivity silicon substrates with and without a trap-rich passivation layer. - C. Roda Neve; Valeria Kilchytska; Joaquín Alvarado; Dimitri Lederer; O. Militaru; Denis Flandre; Jean-Pierre Raskin (Microelectron. Reliab., 2011)

Through silicon via to FinFET noise coupling in 3-D integrated circuits. - A. Rouhi Najaf Abadi; W. Guo; X. Sun; K. Ben Ali; Jean-Pierre Raskin; Martin Rack; C. Roda Neve; M. Choi; V. Moroz; Geert Van der Plas; Ingrid De Wolf; Eric Beyne; et al. (ICICDT, 2015)

Active-lite interposer for 2.5 & 3D integration. - Geert Hellings; Mirko Scholz; Mikael Detalle; Dimitrios Velenis; Muriel de Potter de ten Broeck; C. Roda Neve; Y. Li; Stefaan Van Huylenbroeck; Shih-Hung Chen; Erik Jan Marinissen; Antonio La Manna; Geert Van der Plas; et al. (VLSIC, 2015)

High-density and low-leakage novel embedded 3D MIM capacitor on Si interposer. - C. Roda Neve; Mikael Detalle; Philip Nolmans; Yunlong Li; Joeri De Vos; Geert Van der Plas; Gerald Beyer; Eric Beyne (3DIC, 2016)

Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections. - A. Vandooren; N. Parihar; Jacopo Franco; Roger Loo; Hiroaki Arimura; R. Rodriguez; F. Sebaai; S. Iacovo; Kevin Vandersmissen; W. Li; G. Mannaert; D. Radisic; et al. (VLSI Technology and Circuits, 2022)