A new algorithm for CMOS gate matrix layout. - C. Y. Roger Chen; Cliff Yungchin Hou (ICCAD, 1988)

A new layout optimization methodology for CMOS complex gates. - C. Y. Roger Chen; Cliff Yungchin Hou (ICCAD, 1988)

TOBOL - a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems. - C. Y. Roger Chen (ICCL, 1988)

On a class of (2n-1)-stage rearrangeable interconnection networks. - Calvin J. A. Hsia; C. Y. Roger Chen (ICCD, 1989)

A Transistor Reordering Technique for Gate Matrix Layout. - Uminder Singh; C. Y. Roger Chen (DAC, 1990)

Embedding Networks with Ring Connections in Hypercube Machines. - C. Y. Roger Chen; Yeh-Ching Chung (ICPP (3), 1990)

Permutation Capability of Multistage Interconnection Networks. - Calvin J. A. Hsia; C. Y. Roger Chen (ICPP (1), 1990)

Communication Aspects of the Cube Connected Cycles. - Dikran S. Meliksetian; C. Y. Roger Chen (ICPP (1), 1990)

Architecture for distributed multimedia database systems. - P. Bruce Berra; C. Y. Roger Chen; Arif Ghafoor; Chin Chung Lin; Thomas D. C. Little; Donghoon Shin (Comput. Commun., 1990)

Datapath Scheduling for Two-Level Pipelining. - C. Y. Roger Chen; Michael Z. Moricz (DAC, 1991)

Post-Processor for Data Path Synthesis Using Multiport Memories. - Imtiaz Ahmad; C. Y. Roger Chen (ICCAD, 1991)

A Hierarchical Methodology to Improve Channel Routing by Pin Permutation. - Cliff Yungchin Hou; C. Y. Roger Chen (ICCAD, 1991)

Multimedia Synchronization. - Thomas D. C. Little; C. Y. Roger Chen; C. S. Chang; P. Bruce Berra (IEEE Data Eng. Bull., 1991)

Optimal cell generation for dual independent layout styles. - Bradley S. Carlson; C. Y. Roger Chen; Uminder Singh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

A delay distribution methodology for the optimal systolic synthesis of linear recurrence algorithms. - C. Y. Roger Chen; Michael Z. Moricz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

A heuristic for data path synthesis using multiport memories. - Imtiaz Ahmad; C. Y. Roger Chen (Great Lakes Symposium on VLSI, 1992)

Issues in Networking and Data Management of Distributed Multimedia Systems. - P. Bruce Berra; C. Y. Roger Chen; Arif Ghafoor; Thomas D. C. Little (HPDC, 1992)

The Signal Flow Model: A novel Data Driven Approach to Parallel Processing. - Muhammad F. Mudawwar; C. Y. Roger Chen (ICPP (1), 1992)

Performance Analysis of Communications in Static Interconnection Networks. - Dikran S. Meliksetian; C. Y. Roger Chen (SIGMETRICS, 1992)

From logic to symbolic layout for gate matrix. - Uminder Singh; C. Y. Roger Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IEEE Trans. Parallel Distributed Syst., 1992)

Multimedia object modelling and storage allocation strategies for heterogeneous parallel access storage devices in real time multimedia computing systems. - C. Y. Roger Chen; Kingsley C. Nwosu; P. Bruce Berra (COMPSAC, 1993)

Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering. - Bradley S. Carlson; C. Y. Roger Chen (DAC, 1993)

Modeling and Storage Allocation Strategies for Homogeneous Parallel Access Storage Devices in Real Time Multimedia Information Processing. - C. Y. Roger Chen; Kingsley C. Nwosu; P. Bruce Berra (ICCI, 1993)

A New Model for the Performance Evaluation of Synchronous Circuit Switched Multistage Interconnection Networks. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IPPS, 1993)

A Markov-Modulated Bernoulli Process Approximation for the Analysis of Banyan Networks. - Dikran S. Meliksetian; C. Y. Roger Chen (SIGMETRICS, 1993)

Optimal Routing Algorithm and the Diameter of the Cube-Connected Cycles. - Dikran S. Meliksetian; C. Y. Roger Chen (IEEE Trans. Parallel Distributed Syst., 1993)

Sequencer-Based Data Path Synthesis of Regular Iterative Algorithms. - Mohammed Aloqeely; C. Y. Roger Chen (DAC, 1994)

A new technique for exploiting regularity in data path synthesis. - C. Y. Roger Chen; Mohammed Aloqeely (EURO-DAC, 1994)

Synthesis of Application-Specific Multiprocessor Systems. - Muhammad K. Dhodhi; Imtiaz Ahmad; C. Y. Roger Chen (EDAC-ETC-EUROASIC, 1994)

A gridless multi-layer area router. - Naresh Sehgal; C. Y. Roger Chen; John M. Acken (Great Lakes Symposium on VLSI, 1994)

An object-oriented cell library manager. - Naresh Sehgal; C. Y. Roger Chen; John M. Acken (ICCAD, 1994)

Efficent Boolean Matching Algorithm for Cell Libraries. - Qinghong Wu; C. Y. Roger Chen; John M. Acken (ICCD, 1994)

A High Performance General Purpose Multi-Point Signal Router. - Naresh Kumar Seghal; C. Y. Roger Chen; John M. Acken (ISCAS, 1994)

Performance Evaluation of HIPPI Interconnection System Using a Camp-On Strategy. - Abdulaziz S. Mazyad; C. Y. Roger Chen (LCN, 1994)

Multimedia Object Modeling and Storage Allocation Strategies. - Kingsley C. Nwosu; C. Y. Roger Chen; P. Bruce Berra (J. Intell. Inf. Syst., 1994)

Optimal algorithms for bubble sort based non-Manhattan channel routing. - C. Y. Roger Chen; Cliff Yungchin Hou; Uminder Singh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Performance analysis of single-buffered multistage interconnection networks. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IEEE Trans. Commun., 1994)

An analytical model for partially blocking finite-buffered switching networks. - James V. Luciani; C. Y. Roger Chen (IEEE/ACM Trans. Netw., 1994)

Synthesis of Asynchronous Circuits - Testing Unique Circuit Behavior of Signal Transition Graphs. - Calvin J. A. Hsia; C. Y. Roger Chen (ISCAS, 1995)

Special Issue on Multimedia Processing and Technology. - Arif Ghafoor; C. Y. Roger Chen (J. Parallel Distributed Comput., 1995)

Design of a Multimedia Object-Oriented DBMS. - C. Y. Roger Chen; Dikran S. Meliksetian; M. C. Chang; L. J. Liu (Multim. Syst., 1995)

Dual Eulerian Properties of Plane Multigraphs. - Bradley S. Carlson; C. Y. Roger Chen; Dikran S. Meliksetian (SIAM J. Discret. Math., 1995)

A preprocessor for improving channel routing hierarchical pin permutation. - C. Y. Roger Chen; Cliff Yungchin Hou; Bradley S. Carlson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

A pin permutation algorithm for improving over-the-cell channel routing. - C. Y. Roger Chen; Cliff Yungchin Hou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

LILA: layout generation for iterative logic arrays. - Qinghong Wu; C. Y. Roger Chen; Bradley S. Carlson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks. - C. Y. Roger Chen; Shuo-Hsien Hsiao; Abdulaziz S. Almazyad (IEEE/ACM Trans. Netw., 1995)

A queueing analysis of the performance of DQDB. - C. Y. Roger Chen; Georges A. Makhoul; Dikran S. Meliksetian (IEEE/ACM Trans. Netw., 1995)

Transistor Chaining in CMOS Leaf Cells of Planar Topology. - Bradley S. Carlson; C. Y. Roger Chen; Dikran S. Meliksetian (Great Lakes Symposium on VLSI, 1996)

Smoothing Algorithms for the Delivery of Compressed Video. - Tacettin Kiprulu; Dikran S. Meliksetian; C. Y. Roger Chen (ICC (3), 1997)

Technique for Planning of Terminal Locations of Leaf Cells in Cell-Based Design with Routing Considerations. - Bharat Krishna; C. Y. Roger Chen; Naresh Sehgal (VLSI Design, 1998)

Partitionable multistage interconnection networks. Part 1: Dynamic subcube compaction. - Muhammad Naeem Ayyaz; Dikran S. Meliksetian; C. Y. Roger Chen (Telecommun. Syst., 1998)

Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology. - Bradley S. Carlson; C. Y. Roger Chen; Dikran S. Meliksetian (Discret. Appl. Math., 1999)

A sensitivity based placer for standard cells. - Bill Halpin; C. Y. Roger Chen; Naresh Sehgal (ACM Great Lakes Symposium on VLSI, 2000)

A novel technique for sea of gates global routing. - Bharat Krishna; C. Y. Roger Chen; Naresh Sehgal (ACM Great Lakes Symposium on VLSI, 2000)

Partitionable multistage interconnection networks. Part 2: Task migration schemes. - Muhammad Naeem Ayyaz; Dikran S. Meliksetian; C. Y. Roger Chen (Telecommun. Syst., 2000)

Methodologies for Designing Video Servers. - Dikran S. Meliksetian; Frank Feng-Kuo Yu; C. Y. Roger Chen (IEEE Trans. Multim., 2000)

Timing Driven Placement using Physical Net Constraints. - Bill Halpin; C. Y. Roger Chen; Naresh Sehgal (DAC, 2001)

A novel ultra-fast heuristic for VLSI CAD steiner trees. - Bharat Krishna; C. Y. Roger Chen; Naresh Sehgal (ACM Great Lakes Symposium on VLSI, 2003)

Detailed Placement with Net Length Constraints. - Bill Halpin; Naresh Sehgal; C. Y. Roger Chen (IWSOC, 2003)

A technique for selecting CMOS transistor orders. - Ting Wei Chiang; C. Y. Roger Chen; Wei-Yu Chen (ICCD, 2007)

An efficient gate delay model for VLSI design. - Ting Wei Chiang; C. Y. Roger Chen; Wei-Yu Chen (ICCD, 2007)

Algorithms to simplify multi-clock/edge timing constraints. - Veerapaneni Nagbhushan; C. Y. Roger Chen (ICCD, 2007)

Modeling and reduction of complex timing constraints in high performance digital circuits. - Veerapaneni Nagbhushan; C. Y. Roger Chen (ICCD, 2008)

A tool to generate models based on behavioral IBIS models. - B. S. Deepaksubramanyan; C. Y. Roger Chen; Adrian Nunez (MWSCAS, 2012)

Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model. - Jiani Xie; C. Y. Roger Chen (ACM Great Lakes Symposium on VLSI, 2015)

Leakage power reduction using the body bias and pin reordering technique. - Jae Woong Chun; Chien-Yi Roger Chen (IEICE Electron. Express, 2016)

Transistor and pin reordering for leakage reduction in CMOS circuits. - Jae Woong Chun; C. Y. Roger Chen (Microelectron. J., 2016)

CWcollab: A Context-Aware Web-Based Collaborative Multimedia System. - Chunxu Tang; Beinan Wang; C. Y. Roger Chen; Huijun Wu (ICC, 2021)

CWcollab: Presenting multimedia with web-based context-aware collaboration. - Chunxu Tang; Beinan Wang; C. Y. Roger Chen; Huijun Wu (Entertain. Comput., 2022)