High performance 3D stacked DRAM processor architectures with micro-fluidic cooling. - Caleb Serafy; Bing Shi 001; Ankur Srivastava 001; Donald Yeung (3DIC, 2013)

Online TSV health monitoring and built-in self-repair to overcome aging. - Caleb Serafy; Ankur Srivastava 001 (DFTS, 2013)

Co-optimization of TSV assignment and micro-channel placement for 3D-ICs. - Bing Shi 001; Caleb Serafy; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2013)

Unlocking the true potential of 3D CPUs with micro-fluidic cooling. - Caleb Serafy; Ankur Srivastava 001; Donald Yeung (ISLPED, 2014)

Coupling-aware force driven placement of TSVs and shields in 3D-IC layouts. - Caleb Serafy; Ankur Srivastava 001 (ISPD, 2014)

A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. - Caleb Serafy; Bing Shi 001; Ankur Srivastava 001 (Integr., 2014)

TSV Replacement and Shield Insertion for TSV-TSV Coupling Reduction in 3-D Global Placement. - Caleb Serafy; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

ECO Based Placement and Routing Framework for 3D FPGAs with Micro-fluidic Cooling. - Zhiyuan Yang 001; Caleb Serafy; Ankur Srivastava 001 (FCCM, 2016)

Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs. - Tiantao Lu; Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001 (ISLPED, 2016)

Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks. - Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001; Yuanchen Hu; Yogendra Joshi (IEEE Des. Test, 2016)

Security and Vulnerability Implications of 3D ICs. - Yang Xie 001; Chongxi Bao; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001; Mark Tehranipoor (IEEE Trans. Multi Scale Comput. Syst., 2016)

Unlocking the True Potential of 3-D CPUs With Microfluidic Cooling. - Caleb Serafy; Avram Bar-Cohen; Ankur Srivastava 001; Donald Yeung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors. - Zhiyuan Yang 001; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001 (DAC, 2017)

Design Space Modeling and Simulation for Physically Constrained 3D CPUs. - Caleb Serafy; Zhiyuan Yang 001; Ankur Srivastava 001 (ACM Great Lakes Symposium on VLSI, 2017)

TSV-Based 3-D ICs: Design Methods and Tools. - Tiantao Lu; Caleb Serafy; Zhiyuan Yang 001; Sandeep Kumar Samal; Sung Kyu Lim; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Enhanced Phase-Driven Q-Learning-Based DRM for Multicore Processors. - Zhiyuan Yang 001; Caleb Serafy; Tiantao Lu; Ankur Srivastava 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)