An Effective Diagnosis Method to Support Yield Improvement. - Camelia Hora; Rene Segers; Stefan Eichenberger; Maurice Lousberg (ITC, 2002)

Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model. - Ananta K. Majhi; Guido Gronthoud; Camelia Hora; Maurice Lousberg; Pop Valer; Stefan Eichenberger (VTS, 2003)

On a Statistical Fault Diagnosis Approach Enabling Fast Yield Ramp-Up. - Camelia Hora; Rene Segers; Stefan Eichenberger; Maurice Lousberg (J. Electron. Test., 2003)

Systematic Defects in Deep Sub-Micron Technologies. - Bram Kruseman; Ananta K. Majhi; Camelia Hora; Stefan Eichenberger; Johan Meirlevede (ITC, 2004)

Trends in Testing Integrated Circuits. - Bart Vermeulen; Camelia Hora; Bram Kruseman; Erik Jan Marinissen; Robert Van Rijsinge (ITC, 2004)

Stuck-open fault diagnosis with stuck-at model. - Xinyue Fan; Will R. Moore; Camelia Hora; Guido Gronthoud (ETS, 2005)

A novel stuck-at based method for transistor stuck-open fault diagnosis. - Xinyue Fan; Will R. Moore; Camelia Hora; Guido Gronthoud (ITC, 2005)

A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis. - Xinyue Fan; Will R. Moore; Camelia Hora; Mario Konijnenburg; Guido Gronthoud (VTS, 2006)

Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. - Daniel Arumí; Rosa Rodríguez-Montañés; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman; Maurice Lousberg; Ananta K. Majhi (VTS, 2007)

Diagnosis of Full Open Defects in Interconnecting Lines. - Rosa Rodríguez-Montañés; Daniel Arumí; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman; Maurice Lousberg; Ananta K. Majhi (VTS, 2007)

Extending gate-level diagnosis tools to CMOS intra-gate faults. - Xinyue Fan; Will R. Moore; Camelia Hora; Guido Gronthoud (IET Comput. Digit. Tech., 2007)

Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality. - Stefan Eichenberger; Jeroen Geuzebroek; Camelia Hora; Bram Kruseman; Ananta K. Majhi (ITC, 2008)

Time-dependent Behaviour of Full Open Defects in Interconnect Lines. - Rosa Rodríguez-Montañés; Daniel Arumí; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (ITC, 2008)

Full Open Defects in Nanometric CMOS. - Daniel Arumí; Rosa Rodríguez-Montañés; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (VTS, 2008)

Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs. - Friedrich Hapke; Rene Krenz-Baath; Andreas Glowatz; Jürgen Schlöffel; Hamidreza Hashempour; Stefan Eichenberger; Camelia Hora; Dan Adolfsson (ITC, 2009)

Diagnosis of full open defects in interconnect lines with fan-out. - Rosa Rodríguez-Montañés; Daniel Arumí; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (ETS, 2010)

Impact of Temperature on Test Quality. - Lavanya Jagan; Camelia Hora; Bram Kruseman; Stefan Eichenberger; Ananta K. Majhi; V. Kamakoti 001 (VLSI Design, 2010)

Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example. - Hamidreza Hashempour; Jos Dohmen; Bratislav Tasic; Bram Kruseman; Camelia Hora; Maikel van Beurden; Yizi Xing (DATE, 2011)

Defect Oriented Testing for analog/mixed-signal devices. - Bram Kruseman; Bratislav Tasic; Camelia Hora; Jos Dohmen; Hamidreza Hashempour; Maikel van Beurden; Yizi Xing (ITC, 2011)

Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out. - Daniel Arumí; Rosa Rodríguez-Montañés; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Gate Leakage Impact on Full Open Defects in Interconnect Lines. - Daniel Arumí; Rosa Rodríguez-Montañés; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Defect Oriented Testing for Analog/Mixed-Signal Designs. - Bram Kruseman; Bratislav Tasic; Camelia Hora; Jos Dohmen; Hamidreza Hashempour; Maikel van Beurden; Yizi Xing (IEEE Des. Test Comput., 2012)

Diagnosis of Local Spot Defects in Analog Circuits. - Ke Huang 001; Haralampos-G. D. Stratigopoulos; Salvador Mir; Camelia Hora; Yizi Xing; Bram Kruseman (IEEE Trans. Instrum. Meas., 2012)

Diagnosis of Interconnect Full Open Defects in the Presence of Gate Leakage Currents. - Daniel Arumí; Rosa Rodríguez-Montañés; Joan Figueras; Stefan Eichenberger; Camelia Hora; Bram Kruseman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)