GLIST: Towards In-Storage Graph Learning. - Cangyuan Li; Ying Wang 001; Cheng Liu 008; Shengwen Liang; Huawei Li 001; Xiaowei Li 001 (USENIX ATC, 2021)

APPEND: Rethinking ASIP Synthesis in the Era of AI. - Cangyuan Li; Ying Wang 001; Huawei Li 001; Yinhe Han 001 (DAC, 2023)

Can We Trust Race Prediction? - Cangyuan Li (CoRR, 2023)

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. - Kaiyan Chang; Kun Wang 055; Nan Yang; Ying Wang 001; Dantong Jin; Wenlong Zhu; Zhirong Chen; Cangyuan Li; Hao Yan; Yunhao Zhou; Zhuoliang Zhao; Yuan Cheng; et al. (DAC, 2024)

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. - Kaiyan Chang; Zhirong Chen; Yunhao Zhou; Wenlong Zhu; Kun Wang 055; Haobo Xu; Cangyuan Li; Mengdi Wang; Shengwen Liang; Huawei Li 001; Yinhe Han 001; Ying Wang 001 (ICCAD, 2024)

GTA: a new General Tensor Accelerator with Better Area Efficiency and Data Reuse. - Chenyang Ai; Lechuan Zhao; Zhijie Huang; Cangyuan Li; Xinan Wang; Ying Wang 001 (CoRR, 2024)

Large Processor Chip Model. - Kaiyan Chang; Mingzhi Chen; Yunji Chen; Zhirong Chen; Dongrui Fan; Junfeng Gong; Nan Guo; Yinhe Han 001; Qinfen Hao; Shuo Hou; Xuanjing Huang 001; Pengwei Jin; et al. (CoRR, 2025)

ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning. - Zhirong Chen; Kaiyan Chang; Zhuolin Li; Xinyang He; Chujie Chen; Cangyuan Li; Mengdi Wang; Haobo Xu; Yinhe Han 001; Ying Wang 001 (CoRR, 2025)