A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium. - Cankun Zhao; Neng Zhang 002; Hanning Wang; Bohan Yang 001; Wenping Zhu; Zhengdong Li; Min Zhu 001; Shouyi Yin; Shaojun Wei; Leibo Liu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022)

A Low-Randomness First-Order Masked Xoodyak. - Shuohang Peng; Bohan Yang 001; Shuying Yin; Hang Zhao; Cankun Zhao; Shaojun Wei; Leibo Liu (HOST, 2023)

Sparse Polynomial Multiplication-Based High-Performance Hardware Implementation for CRYSTALS-Dilithium. - Hang Zhao; Cankun Zhao; Wenping Zhu; Bohan Yang 001; Shaojun Wei; Leibo Liu (HOST, 2024)

A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. - Jiangxue Liu; Cankun Zhao; Shuohang Peng; Bohan Yang 001; Hang Zhao; Xiangdong Han; Min Zhu 001; Shaojun Wei; Leibo Liu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

Breaking Ground: A New Area Record for Low-Latency First-Order Masked SHA-3 Advancing from the 4x Area Era to the 3x Area Era. - Cankun Zhao; Hang Zhao; Jiangxue Liu; Bohan Yang 001; Wenping Zhu; Shuying Yin; Min Zhu 001; Shaojun Wei; Leibo Liu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)