Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor. - Scott A. Taylor; Michael Quinn; Darren Brown; Nathan Dohm; Scot Hildebrandt; James Huggins 001; Carl Ramey (DAC, 1998)

Zen and the art of Alpha verification. - Nathan Dohm; Carl Ramey; Darren Brown; Scot Hildebrandt; James Huggins 001; Michael Quinn; Scott A. Taylor (ICCD, 1998)

A Simulation-Based Method for the Verification of Shared Memory in Multiprocessor Systems. - Scott A. Taylor; Carl Ramey; Craig Barner; David Asher (ICCAD, 2001)

On-Chip Interconnection Architecture of the Tile Processor. - David Wentzlaff; Patrick Griffin; Henry Hoffmann; Liewei Bao; Bruce Edwards; Carl Ramey; Matthew Mattina; Chyi-Chang Miao; John F. Brown III; Anant Agarwal (IEEE Micro, 2007)

TILE64 - Processor: A 64-Core SoC with Mesh Interconnect. - Shane Bell; Bruce Edwards; John Amann; Rich Conlin; Kevin Joyce; Vince Leung; John MacKay; Mike Reif; Liewei Bao; John F. Brown III; Matthew Mattina; Chyi-Chang Miao; et al. (ISSCC, 2008)

TILE-Gx100 ManyCore processor: Acceleration interfaces and architecture. - Carl Ramey (Hot Chips Symposium, 2011)

Silicon Photonics for Artificial Intelligence Acceleration : HotChips 32. - Carl Ramey (Hot Chips Symposium, 2020)

Accelerating Artificial Intelligence with Silicon Photonics. - Nicholas C. Harris; Ryan Braid; Darius Bunandar; Jim Carr; Brad Dobbie; Carlos Dorta-Quinones; Jon Elmhurst; Martin Forsythe; Michael Gould; Shashank Gupta; Sukeshwar Kannan; Tyler Kenney; et al. (OFC, 2020)