A self-biased low voltage, low power, CMOS transconductor stage. - Michele Fedeli; Carla Vacchi (ISCAS, 2000)

Digital Nuclear Magnetic Resonance Acquisition Channel. - Paola Baldrighi; Marco Castellano; Carla Vacchi; Davide Canina; Paolo Golzi; Gianni Ferrante (DSD, 2008)

Implementation of Microprogrammed Hard Disk Drive Servo Sequencer. - Paola Baldrighi; Marco Maurizio Maggi; Marco Castellano; Carla Vacchi; Davide Crespi; Piero Bonifacino (DSD, 2008)

CHIPIX65: Developments on a new generation pixel readout ASIC in CMOS 65 nm for HEP experiments. - N. Demaria; G. Dellacasa; G. Mazza; Angelo Rivetti; Manuel D. Da Rocha Rolo; E. Monteil; L. Pacher; Fabio Ciciriello; Francesco Corsi; Cristoforo Marzocca; G. De Roberts; F. Loddo; et al. (IWASI, 2015)

Design Algorithm for N-bit Input Parallel Counters in Application to dSiPM Readout. - Simone Giroletti; Lodovico Ratti; Carla Vacchi (PRIME, 2022)

Charge Sensitive Amplifiers with Bi- and Trilinear Signal Compression Feature for LGAD Detectors. - Simone Giroletti; Lodovico Ratti; Carla Vacchi (PRIME, 2023)

Pseudo-Differential Time-to-Amplitude Converter for LGAD Based Particle Detectors. - Simone Giroletti; Lodovico Ratti; Carla Vacchi (ISCAS, 2024)

Modeling I-MOS Capacitor C-V Characteristic for Non-Linear Charge Sensitive Amplifiers. - Simone Giroletti; Fatemeh Shojaei; Massimo Manghisoni; Lodovico Ratti; Carla Vacchi (PRIME, 2024)