Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation. - Carlos Boneti; Francisco J. Cazorla; Roberto Gioiosa; Mateo Valero (ARCS, 2008)

Balancing HPC applications through smart allocation of resources in MT processors. - Carlos Boneti; Roberto Gioiosa; Francisco J. Cazorla; Julita Corbalán; Jesús Labarta; Mateo Valero (IPDPS, 2008)

Software-Controlled Priority Characterization of POWER5 Processor. - Carlos Boneti; Francisco J. Cazorla; Roberto Gioiosa; Alper Buyuktosunoglu; Chen-Yong Cher; Mateo Valero (ISCA, 2008)

A dynamic scheduler for balancing HPC applications. - Carlos Boneti; Roberto Gioiosa; Francisco J. Cazorla; Mateo Valero (SC, 2008)

Exploring coordinated software and hardware support for hardware resource allocation. - Carlos Boneti (2009)

Power and thermal characterization of POWER6 system. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Mateo Valero; Carlos Boneti; Eren Kursun; Chen-Yong Cher; Canturk Isci; Alper Buyuktosunoglu; Pradip Bose (PACT, 2010)

Characterizing Power and Temperature Behavior of POWER6-Based System. - Víctor Jiménez; Francisco J. Cazorla; Roberto Gioiosa; Mateo Valero; Carlos Boneti; Eren Kursun; Chen-Yong Cher; Canturk Isci; Alper Buyuktosunoglu; Pradip Bose (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

SMT Malleability in IBM POWER5 and POWER6 Processors. - Alessandro Morari; Carlos Boneti; Francisco J. Cazorla; Roberto Gioiosa; Chen-Yong Cher; Alper Buyuktosunoglu; Pradip Bose; Mateo Valero (IEEE Trans. Computers, 2013)

High-resolution imaging on TPUs. - Fantine Huot; Yi-Fan Chen; Robert G. Clapp; Carlos Boneti; John R. Anderson (CoRR, 2019)